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DSA2IH00171474.pdf
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Ä 7 # û * M y i(g r a ® K S HIGH SPEED tpD =11 ns (TYP.) AT Vcc = 5 V LOW POWER DISSIPATION Ice = 1 nA (MAX.) AT Ta = 25 "C COMPATIBLE WITH TTL OUTPUTS ViH = 2V (MIN.) ViL = 0.8V (MAX) OUTPUT DRI
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74HCT02
74LS02
74LS02 gate diagram
M74HCT02B1
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