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    DSAUPLD00002950.pdf by Not Available

    • 5 4 3 2 1 ZK3 BLOCK DIAGRAM DDRII-SODIMM1 PG 7,8 D CPU_CORE1 CPU_CORE2 CPU VDDNB_CORE HOST 200MHz +NB_CORE +1.35V_VDDHTTX +2.5V +1.5V +1.2V +1.1V_NB CPU CORE PG 35 PCB STAC
    • Original
    • Yes
    • Unknown
    • Obsolete

    DSAUPLD00002950.pdf preview
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