DSA00935312.pdf by Zarlink Semiconductor
- ZL30110 Telecom Rate Conversion DPLL Data Sheet Features · · Synchronizes to 8 kHz, 2.048 MHz, 8.192 MHz or 16.384 MHz Provides a range of output clocks: · · · 65.536 MHz TDM clock locked to the inp
- Original
- Unknown
- Unknown
- Unknown
-
Powered by
Findchips
