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Scans-00137428.pdf
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â GENERAL DESCRIPTION The MSM70V000 series is the gate array LSI based on the master slice method using the high performance silicon gate 1.5 micron HCMOS process with the dual-layer metal struc
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User Tagged Keywords
3-8 decoder 74138
7 INPUT NOR GATE
74137
74138 logic gates
74139
74139 Dual 2 to 4 line decoder
74139 for bcd to excess 3 code
74151 adder
74155
74158
74160 4-bit Decade Counter Asynchronous reset
74160 counter
74160 function table
74161
74164 counter
74168
74169 binary counter
74169 binary direction counter
74169 SYNCHRONOUS 4-BIT BINARY COUNTER
74175 flip flops
74179
74183
74183 4 bit
74183 adder
74183 alu
74191, 74192, 74193
74194 shift register
74261
74278
74283
74373 cmos dual s-r latch
74374 74373
74381 alu
74395
7449 BCD to 7-segment
7449 DECODER
74541 buffer
7482 adder
7493 4 bit binary counter
7493 4 bit shift register
7493 Decade Counter
7495 4-bit latch
74LS TTL Oscillator
74v00
8 BIT ALU by 74181
alu 74181
alu 74381
BCD Decade 8-Bit binary counters 7493
bst l35 110
ci 74192
ci 74ls 123
counter 74168
counter 74169
decade counter 7492
decoder 3-8 74ls with nor gate
decoder 74138
decoder 74139
design a bcd counter using jk flip flop
FLIP FLOP toggle
inverter 74169 binary counter
mh 74150
MH 74151
mh 74154
MH 74161
operation of sr latch using nand gates
register 7495
S-R flip flop clock
shift register 74164
shift Register 74195
Shift Register 74377"
shift register 7491
shift register 7495
synchronous counter using 4 flip flip
synchronous counter using flip flip
Toggle flip flop
TTL 74
TTL 74139
TTL 74373
ttl 7493