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    DSA00102497.pdf by Xilinx

    • P1 TTL0 P1 D3 A1 TTL3 A2 TTL6 D2 A3 TTL9 D1 D0 A4 S1-W2 S1-AA4 S1-AD3 S1-AE3 TTL1 P1 D4 B1 TTL4 B2 TTL7 TTL2 B3 TTL10 S1-U2 S1-R2
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