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    Part Img 74AC11074D datasheet by Texas Instruments

    • DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET
    • Scan
    • No
    • Obsolete
    • EAR99
    • 8542.39.00.01
    • 8542.39.00.00
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    74AC11074D datasheet preview

    74AC11074D Frequently Asked Questions (FAQs)

    • The 74AC11074D can handle clock frequencies up to 100 MHz.
    • The 74AC11074D requires a power supply voltage of 3.3V or 5V, and it is recommended to use a decoupling capacitor of 0.1uF or 0.01uF between the VCC and GND pins to ensure proper power supply decoupling.
    • The 74AC11074D can sink or source up to 24mA of current per output pin.
    • The asynchronous reset input (MR) should be tied to VCC through a pull-up resistor (e.g. 1kΩ) to ensure that the device is properly reset. A capacitor (e.g. 0.1uF) can also be added in parallel to the pull-up resistor to filter out noise.
    • The propagation delay of the 74AC11074D is typically around 3.5ns to 5.5ns, depending on the operating conditions and output load.
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