74HC74DB,112 datasheet by NXP Semiconductors

Description Dual D-type flip-flop with set and reset; positive-edge trigger - Description: Dual D-Type Flip-Flop with Set and Reset; Positive-Edge Trigger ; F<sub>max</sub>: 82 MHz; Logic switching levels: CMOS ; Number of pins: 14 ; Output drive capability: +/- 5.2 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 14@5V ns; Voltage: 2.0-6.0 V; Package: SOT337-1 (SSOP14); Container: Tube
Datasheet Type Original
RoHS Yes
Pb Free Unknown
Lifecycle Transferred
HTS Code 8542.39.00.01
Schedule B 8542.39.00.00
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74HC74DB,112 datasheet preview

The recommended operating voltage range for the 74HC74DB,112 is 2.0 V to 6.0 V, with a typical voltage of 5.0 V.
It is recommended to power up the VCC pin first, followed by the input signals, and power down the input signals first, followed by the VCC pin to prevent latch-up or damage to the device.
The maximum frequency of operation for the 74HC74DB,112 is 100 MHz, but this can vary depending on the specific application and operating conditions.
It is recommended to use a 0.1 μF to 1 μF decoupling capacitor between the VCC pin and GND pin, as close to the device as possible, to filter out noise and ensure stable operation.
The maximum current that the 74HC74DB,112 can sink or source is 25 mA per output pin, but this can vary depending on the specific application and operating conditions.

74HC74DB,112 datasheet preview Download Datasheet