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    Part Img 74LVC00APW,118 datasheet by NXP Semiconductors

    • Quad 2-input NAND gate - Description: 3.3V Quad 2-Input NAND Gate ; Logic switching levels: TTL ; Number of pins: 14 ; Output drive capability: +/- 24 mA ; Power dissipation considerations: Low Power or Battery Applications ; Propagation delay: 2.1@3.3V ns; Voltage: 1.2-3.6; Package: SOT402-1 (TSSOP14); Container: Reel Pack, SMD, 13"
    • Original
    • Yes
    • Unknown
    • Transferred
    • 8542.39.00.01
    • 8542.39.00.00
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    74LVC00APW,118 datasheet preview

    74LVC00APW,118 Frequently Asked Questions (FAQs)

    • The maximum operating frequency of the 74LVC00APW,118 is 100 MHz.
    • Yes, the 74LVC00APW,118 is 5V tolerant, meaning it can accept input voltages up to 5.5V even when operating at a lower VCC voltage.
    • The power consumption of the 74LVC00APW,118 is typically around 1.5 μA per gate at 3.3V and 25°C.
    • Yes, the 74LVC00APW,118 is rated for operation over a wide temperature range of -40°C to +125°C, making it suitable for use in high-temperature applications.
    • Yes, the 74LVC00APW,118 can be used in a 3.3V system with 5V inputs, thanks to its 5V tolerant inputs.
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