DSAFRAZ003037.pdf by Xilinx

Partial File Text Application Note: Virtex-II Series R XAPP606 (v1.1) July 10, 2002 XGMII Using the DDR Registers, DCM, and SelectI/O-Ultra Features Author: Martin Rhodes Summary The DDR, DCM, and Select
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10Gigabit Ethernet PHY CLK180 vhdl code for clock phase shift vhdl code for DCM XAPP606