DSAAQ0072105.pdf by Cypress Semiconductor

Partial File Text PRELIMINARY CY7C1310V18 CY7C1312V18 CY7C1314V18 18-Mb QDRTM-II SRAM 2-Word Burst Architecture Features · Separate independent Read and Write data ports -- Supports concurrent transactions · 16
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
Price & Stock
Powered by Findchips

DSAAQ0072105.pdf preview Download Datasheet