DSA00169565.pdf by Cypress Semiconductor

Partial File Text 144-Mbit QDR II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) 144-Mbit QDR ® II+ SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency) CY7C1661KV18, CY7C1676KV18 CY7C1663KV18, CY7C166
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