The recommended input impedance is 1 kΩ to 10 kΩ. This ensures proper signal attenuation and prevents signal reflections.
For low-frequency signals, use the ADC's internal clock and set the clock frequency to 10 MHz or lower. This reduces noise and increases the signal-to-noise ratio.
The maximum input voltage is VREF + 0.3 V, where VREF is the reference voltage. Exceeding this voltage may damage the ADC.
Use a low-pass filter or a decoupling capacitor (e.g., 10 nF) between the ADC's output and the system's digital circuitry to reduce noise and interference.
Power up the ADC in the following sequence: VDD, VREF, and then CLKIN. This ensures proper initialization and prevents latch-up.