Texas Instruments provides a recommended PCB layout in the ADS58B19IRGZT evaluation module documentation. It's essential to follow the layout guidelines to minimize noise, ensure proper grounding, and optimize signal integrity.
The ADS58B19IRGZT has a programmable gain amplifier (PGA) that can be configured using the SPI interface. Refer to the device's programming guide and the PGA configuration register descriptions in the datasheet to set the desired gain.
The ADS58B19IRGZT can handle input voltages up to VREF (reference voltage) + 0.3V. However, it's recommended to keep the input voltage within the specified range of VREF ± 10% to ensure accurate conversions.
To minimize clock jitter, use a high-quality clock source, such as a crystal oscillator, and ensure proper decoupling and filtering. Additionally, use the device's internal clock jitter filter or implement an external filter to reduce jitter.
The recommended power-up sequence is to power up the analog supply (AVDD) first, followed by the digital supply (DVDD), and then the clock signal. This sequence helps prevent latch-up and ensures proper device operation.