The recommended power-up sequence is to apply VCC first, followed by VREF, and then the analog input signal. This ensures proper operation and prevents damage to the device.
To optimize the analog input impedance, use a source impedance of 1 kΩ or less, and ensure the analog input signal is properly terminated. This ensures maximum signal integrity and accuracy.
The maximum sampling rate for the ADS7842E/1K is 200 kHz. However, the actual sampling rate may be limited by the system's clock frequency and the conversion time of the ADC.
The internal clock oscillator can be used as a clock source, but it's recommended to use an external clock source for better accuracy and stability. If using the internal oscillator, ensure it's properly bypassed and decoupled.
The VREF pin sets the reference voltage for the ADC. It's recommended to use a stable, low-noise voltage source for VREF to ensure accurate conversions. A bypass capacitor is also recommended to filter out noise.
ADS7842E/1K datasheet
by Texas Instruments
