Texas Instruments recommends a 4-layer PCB with a solid ground plane, and to keep the analog and digital traces separate. Additionally, use a low-ESR capacitor for the AVDD pin and a 0.1uF capacitor for the REF pin. Route the analog input traces away from the digital traces and keep them as short as possible.
To optimize the ADS7955SDBT for low-power operation, use the lowest possible clock frequency, disable the internal reference voltage, and use the power-down mode when not converting. Additionally, consider using a lower AVDD voltage and reducing the sampling rate.
The ADS7955SDBT has an internal calibration circuit that can be used to calibrate the device. Apply a known input voltage to the analog input pins, and then use the CAL pin to initiate the calibration process. The device will then adjust its internal offset and gain to match the input voltage.
The ADS7955SDBT outputs 16-bit data in a binary two's complement format. The data is output on the D[15:0] pins, with D[15] being the MSB and D[0] being the LSB. The data is valid on the rising edge of the SCLK pin.
The maximum sampling rate of the ADS7955SDBT is 250 kSPS. The power consumption of the device increases with the sampling rate, so reducing the sampling rate can help reduce power consumption. However, the device's power consumption is typically dominated by the analog circuitry, so the impact of sampling rate on power consumption is relatively small.
ADS7955SDBT datasheet
by Texas Instruments
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