Texas Instruments recommends a 4-layer PCB with a solid ground plane, and to keep the analog and digital signals separate. The analog input traces should be short and direct, and the digital output traces should be routed away from the analog inputs. Additionally, decoupling capacitors should be placed close to the device.
To minimize EMI, it is recommended to use a low-inductance path for the digital outputs, such as a stripline or microstrip transmission line. Additionally, the digital outputs should be terminated with a 50-ohm resistor to match the impedance of the transmission line. Shielding and grounding of the digital output cables can also help reduce EMI.
The recommended power-up sequence is to first apply the analog power supply (AVDD), followed by the digital power supply (DVDD), and then the clock signal. This sequence helps to ensure that the device powers up in a stable state and minimizes the risk of latch-up or other issues.
The ADS900E/1K has an internal calibration circuit that can be used to calibrate the device. The calibration process involves applying a known input signal and then adjusting the internal calibration registers to achieve the desired accuracy. Texas Instruments provides a calibration procedure in the device's datasheet and application notes.
The maximum clock frequency for the ADS900E/1K is 100 MHz. Using a higher clock frequency can result in increased power consumption, reduced signal-to-noise ratio, and increased jitter. However, using a higher clock frequency can also increase the sampling rate and improve the device's overall performance.
ADS900E/1K datasheet
by Texas Instruments
Findchips
