CD4046BE datasheet by Texas Instruments

CD4046BE Frequently Asked Questions (FAQs)

• What is the recommended power-on sequence for the CD4046BE?
  The recommended power-on sequence is to apply VCC before applying any input signals to the device. This ensures that the internal bias circuitry is established before the PLL is enabled.
• How do I ensure the CD4046BE PLL locks to the correct frequency?
  To ensure the PLL locks to the correct frequency, ensure that the input frequency is within the specified range, and the loop filter components are correctly selected. Also, ensure that the VCO range is set correctly and the PLL is not over-driven.
• What is the maximum frequency deviation that the CD4046BE can handle?
  The CD4046BE can handle a maximum frequency deviation of ±3.5% of the center frequency. Exceeding this limit may cause the PLL to lose lock or malfunction.
• How do I minimize jitter in the CD4046BE output?
  To minimize jitter, ensure that the input signal is clean and free of noise, and the loop filter components are correctly selected. Also, consider using a low-jitter reference clock and minimizing the number of clock domain crossings.
• Can I use the CD4046BE as a frequency multiplier?
  Yes, the CD4046BE can be used as a frequency multiplier. However, the output frequency range is limited to 1/4 to 4 times the input frequency. Also, ensure that the VCO range is set correctly and the PLL is not over-driven.