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    Part Img CDCLVP110MVFR datasheet by Texas Instruments

    • 1:10 LVPECL/HSTL to LVPECL Clock Driver 32-LQFP -40 to 85
    • Original
    • Yes
    • Yes
    • Active
    • EAR99
    • 8542.39.00.01
    • 8542.39.00.00
    • Find it at Findchips.com

    CDCLVP110MVFR datasheet preview

    CDCLVP110MVFR Frequently Asked Questions (FAQs)

    • The recommended operating voltage range for CDCLVP110MVFR is 1.1V to 1.35V, with a typical operating voltage of 1.2V.
    • To ensure proper power sequencing, apply power to the VCC pin first, followed by the input clock signal. This ensures that the internal PLL is properly initialized.
    • The CDCLVP110MVFR supports clock frequencies up to 110 MHz.
    • The output clock frequency and phase can be configured using the SEL0-SEL2 pins. Refer to the datasheet for the specific configuration options.
    • The typical jitter performance of CDCLVP110MVFR is around 150 fs RMS (random jitter) and 1.5 ps peak-to-peak (periodic jitter).
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