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CY7C1312BV18-167BZCT
datasheet
by Cypress Semiconductor
Description
18-Mbit QDR -II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 1.7 to 1.9 V
Datasheet Type
Original
RoHS
No
Pb Free
No
Lifecycle
Obsolete
ECCN
3A991.B.2.A
HTS Code
8542.32.00.41
Schedule B
8542.32.00.40
Price & Stock
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CY7C1312CV18-167BZXI
CY7C1312CV18-167BZI
CY7C1312CV18-167BZXC
CY7C1312BV18-167BZCT
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