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CY7C1518KV18-300BZC
datasheet
by Cypress Semiconductor
Description
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Datasheet Type
Original
RoHS
No
Pb Free
Unknown
Lifecycle
Obsolete
ECCN
3A991.B.2.A
HTS Code
8542.32.00.41
Schedule B
8542.32.00.40
Price & Stock
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