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CY7C1570KV18-550BZXC
datasheet
by Cypress Semiconductor
Description
72-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: DDR
...
-II+ CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
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Datasheet Type
Original
RoHS
Yes
Lifecycle
Transferred
ECCN
3A991.B.2.A
HTS Code
8542.32.00.41
Schedule B
8542.32.00.40
Price & Stock
Find it at Findchips.com
Equivalent Parts
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CY7C1570KV18-550BZXI
CY7C1570KV18-550BZXI
CY7C1570KV18-550BZC
CY7C1570KV18-550BZXC
CY7C1570KV18-550BZXC
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