The DS1388Z-3+ should be placed away from high-frequency noise sources and have a dedicated power supply decoupling capacitor (e.g., 0.1uF) as close to the VCC pin as possible. The crystal oscillator circuit should be laid out to minimize parasitic capacitance and inductance.
To ensure reliable oscillator startup, use a high-quality crystal with a suitable load capacitance (e.g., 12pF) and ensure the oscillator circuit is properly biased (e.g., R1 = 1kΩ, R2 = 10kΩ). In cold temperatures, consider adding a startup capacitor (e.g., 10nF) in parallel with the crystal to aid startup.
The maximum allowed capacitance on the SQW/OUT pin is 100pF. Exceeding this value can reduce the output frequency and affect the oscillator's stability. Keep the load capacitance as low as possible to ensure accurate timekeeping.
Check the power supply voltage, crystal oscillator circuit, and layout for any issues. Verify the crystal frequency and load capacitance are correct. Use an oscilloscope to inspect the SQW/OUT pin for proper oscillation. If issues persist, try replacing the crystal or the DS1388Z-3+ IC.
While the DS1388Z-3+ is designed for a 32.768kHz crystal, you can use it with other frequencies (e.g., 12.5MHz) by adjusting the load capacitance and internal oscillator settings. However, this may affect the oscillator's stability and accuracy. Consult the datasheet and application notes for guidance on using alternative frequencies.