Vishay provides a recommended PCB layout and land pattern in their application note AN1025, which can be found on their website. Following this layout ensures optimal thermal performance and minimizes parasitic inductance.
To minimize magnetic field interference, keep the inductor at least 5 mm away from sensitive components, such as oscillators, antennas, or magnetically sensitive devices. You can also use shielding techniques, like mu-metal or ferrite sheets, to contain the magnetic field.
Although the datasheet doesn't specify a maximum allowed voltage during saturation, it's generally recommended to limit the voltage to 1.5 to 2 times the nominal voltage rating to prevent damage to the inductor. In this case, the maximum allowed voltage would be around 37.5 V to 50 V.
The SRF can be estimated using the formula: SRF ≈ (1 / (2 * π * √(L * C))), where L is the inductance and C is the equivalent series capacitance (ESC). The ESC can be found in the datasheet or calculated using the inductor's physical dimensions and materials.
The thermal resistance (Rth) of the IHTH0750JZEB101M5A is approximately 2.5°C/W. This value indicates how much the inductor's temperature will rise above the ambient temperature for a given power dissipation. You should consider Rth when designing the system to ensure the inductor operates within its specified temperature range.