The recommended power-on sequence is to apply VDD first, followed by VDDIO, and then the clock signal. This ensures proper initialization of the device.
To configure the LIS352ARTR for low-power mode, set the LPEN bit in the CTRL_REG1 register to 1. This reduces the current consumption to approximately 10 μA.
The LIS352ARTR has a maximum acceleration range of ±2g, ±4g, ±8g, or ±16g, depending on the range selection made through the CTRL_REG2 register.
The LIS352ARTR can be interfaced with a microcontroller through a SPI or I2C interface. The device operates as a slave device, and the microcontroller acts as the master.
The INT1 and INT2 pins are interrupt pins that can be configured to generate interrupts based on specific events, such as data ready, overrun, or free-fall detection.
LIS352ARTR datasheet
by STMicroelectronics
