A good PCB layout for the LMZ10505EXTTZ/NOPB involves keeping the input and output capacitors close to the device, using a solid ground plane, and minimizing the length of the input and output traces. A 4-layer PCB with a dedicated power plane and a solid ground plane is recommended.
To ensure the device operates within its thermal limits, ensure good airflow around the device, use a heat sink if necessary, and avoid blocking the airflow around the device. Also, ensure that the device is not exposed to high ambient temperatures.
The recommended input capacitor value is 10uF to 22uF, and a low-ESR ceramic capacitor (X5R or X7R dielectric) is recommended. The capacitor should be placed as close to the VIN pin as possible.
The enable pin (EN) should be tied to a logic-level signal that is high during normal operation and low during shutdown. During power-up, the EN pin should be low until the input voltage reaches the minimum operating voltage, and during power-down, the EN pin should be low before the input voltage drops below the minimum operating voltage.
The recommended output capacitor value is 10uF to 22uF, and a low-ESR ceramic capacitor (X5R or X7R dielectric) is recommended. The capacitor should be placed as close to the VOUT pin as possible.
LMZ10505EXTTZ/NOPB datasheet
by Texas Instruments
