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    PCF8811MU/2DA/1,02 datasheet by NXP Semiconductors

    • 80 x 128 pixels matrix LCD driver; Package: Uncased die; Container: Die In Waffle Carriers
    • Original
    • Yes
    • Obsolete
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    PCF8811MU/2DA/1,02 datasheet preview

    PCF8811MU/2DA/1,02 Frequently Asked Questions (FAQs)

    • The recommended operating voltage range is 1.65V to 3.6V, with a typical voltage of 1.8V.
    • To ensure reliable data retention, it is recommended to follow the datasheet guidelines for write endurance, write cycles, and data retention periods. Additionally, using a capacitor with a suitable value and type can help maintain the power supply voltage during power-down.
    • The maximum clock frequency for the PCF8811MU/2DA/1,02 is 400 kHz.
    • The PCF8811MU/2DA/1,02 has an internal POR and PDR circuitry. During power-up, the device resets internally, and during power-down, the device enters a low-power state. No external circuitry is required for POR and PDR.
    • The WP pin is used to enable or disable write protection for the entire memory array. When WP is low, the memory is write-protected, and when WP is high, the memory is writable.
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