PCM1782DBQR datasheet by Texas Instruments

PCM1782DBQR Frequently Asked Questions (FAQs)

• What is the recommended power-up sequence for the PCM1782DBQR?
  The recommended power-up sequence is to apply VCC first, followed by AVCC, and then DVCC. This ensures that the internal voltage regulators are powered up correctly.
• How do I configure the PCM1782DBQR for master mode operation?
  To configure the PCM1782DBQR for master mode operation, set the MCLK pin to the desired clock frequency, and set the BCLK and LRCLK pins as outputs. Then, set the I2S format to master mode by writing to the I2S Control Register (address 0x01).
• What is the maximum allowed capacitance for the analog input filters?
  The maximum allowed capacitance for the analog input filters is 10 nF. Exceeding this value may affect the performance of the ADC.
• How do I optimize the PCB layout for the PCM1782DBQR?
  To optimize the PCB layout, keep the analog and digital grounds separate, use a solid ground plane, and keep the analog input traces short and away from digital signals. Also, use a common mode filter on the analog inputs to reduce noise.
• What is the recommended clock frequency for the PCM1782DBQR?
  The recommended clock frequency for the PCM1782DBQR is 256 fs (where fs is the sampling frequency). This ensures that the ADC operates within its specified performance range.