PCM1804DBRG4 datasheet by Texas Instruments

PCM1804DBRG4 Frequently Asked Questions (FAQs)

• What is the recommended power-up sequence for the PCM1804?
  The recommended power-up sequence is to apply VCC first, followed by VREF, and then the clock signal. This ensures proper initialization of the device.
• How do I optimize the analog input circuitry for best performance?
  Use a low-pass filter with a cutoff frequency below 20 kHz to remove high-frequency noise, and ensure the input impedance is matched to the analog source. Also, use a buffer amplifier if the source impedance is high.
• What is the maximum allowed clock jitter for the PCM1804?
  The maximum allowed clock jitter is 100 ps RMS. Exceeding this value can result in increased jitter in the digital output signal.
• Can I use the PCM1804 with a separate analog ground plane?
  Yes, but ensure that the analog ground plane is connected to the digital ground plane at a single point, preferably near the power supply. This helps to reduce noise and improve performance.
• How do I handle the digital output data format?
  The PCM1804 outputs data in I²S format. Ensure that the receiving device is configured to accept I²S data, and that the clock and data lines are properly synchronized.