The maximum clock frequency for the UART is 24 MHz, but it can be overclocked up to 30 MHz with some limitations.
FIFO interrupts can be handled by enabling the FIFO interrupt enable bits (FERIE or FTRIE) and setting the trigger levels (FTL or FRL) according to the application requirements.
The fractional baud rate generator allows for more accurate baud rate generation, especially at higher frequencies, by dividing the input clock frequency by a fractional value.
Yes, the SC16C654BIB64,128 can be used as a UART-only device by disabling the IrDA and other non-UART functions.
Flow control can be implemented using the RTS and CTS signals, which can be controlled using the UART's flow control registers (FCR and FSR).