The maximum frequency of the clock input is 30 MHz, but it's recommended to keep it below 20 MHz for reliable operation.
The recommended sequence is: GSCLK low, SCLK low, XLAT high, then GSCLK high to latch the data. After that, SCLK can be clocked to shift out the data, and XLAT can be brought low to start the next cycle.
The VPRG pin is used to set the internal voltage reference for the grayscale PWM generator. It should be connected to a voltage source between 1.2V and 3.3V, with 2.5V being the recommended value.
The TLC5940 has a built-in thermal shutdown protection feature that will shut down the device if it overheats. To handle this, you can monitor the TSD pin, which will go low if the device overheats. You can then take corrective action, such as reducing the current or shutting down the device.
The recommended layout and routing for the TLC5940 involves keeping the analog and digital signals separate, using a solid ground plane, and minimizing the length of the traces between the TLC5940 and the LEDs. It's also recommended to use a bypass capacitor between VCC and GND.