The recommended power-up sequence is to apply VDD first, followed by VDDIO, and then the clock signal. This ensures proper initialization of the device.
The TLV320AIC3105 can be configured using the SPI or I2C interface. Refer to the datasheet for register settings and configuration examples for different audio applications, such as audio playback, recording, or both.
The TLV320AIC3105 supports clock frequencies up to 50 MHz. However, the recommended clock frequency is 12.288 MHz for most audio applications.
To optimize the TLV320AIC3105 for low power consumption, use the power-down modes, adjust the clock frequency, and optimize the analog and digital supply voltages. Refer to the datasheet for more information on power-saving features.
The main difference between the TLV320AIC3105 and the TLV320AIC3106 is the number of analog-to-digital converters (ADCs) and digital-to-analog converters (DACs). The TLV320AIC3105 has two ADCs and two DACs, while the TLV320AIC3106 has four ADCs and four DACs.
TLV320AIC3105IRHBT datasheet
by Texas Instruments
