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Partial File Text GENERAL DESCRIPTION T h e M S M 7 0 H 0 0 0 series is the gate array LSI based on the m aster slice m e th o d using the high p erfo rm a n c e silicon gate 2 m ic ro n H C M O S process w ith th e
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74373 cmos dual s-r latch buffer 74374 of IC 74191