DSARS002333.pdf by National Semiconductor

Partial File Text DS90C241/DS90C124 5-35MHz DC-Balanced 24-Bit LVDS Serializer and Deserializer General Description User selectable clock edge for parallel data on both The DS90C241/DS90C124 Chipset translate
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AEC-Q100 AN-1108 AN-1217 DS90C124 DS90C241 ISO10605 RGB666