DSA00269532.pdf by Cypress Semiconductor

Partial File Text CY2SSTU877 PRELIMINARY 1.8V, 500-MHz, 10-Output JEDEC-Compliant Zero Delay Buffer Features · Operating frequency: 125 MHz to 500 MHz · Supports DDRII SDRAM · Ten differential outputs from o
Datasheet Type Original
RoHS Unknown
Pb Free Unknown
Lifecycle Unknown
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