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    "PROCESSOR" "SHIFT REGISTER" ALU Search Results

    "PROCESSOR" "SHIFT REGISTER" ALU Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    TMPM4GQF15FG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP144-2020-0.50-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM4GRF20FG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP176-2020-0.40-002 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM4KMFWAFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP80-1212-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM4MMFWAFG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP80-1212-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
    TMPM4NQF10FG Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP144-2020-0.50-002 Visit Toshiba Electronic Devices & Storage Corporation

    "PROCESSOR" "SHIFT REGISTER" ALU Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    SN74AS888

    Abstract: AS888 CI 4016 SN74AS888-1 srf 2338 "Overflow detection"
    Text: SN54AS888, SN74AS888 8-BIT PROCESSOR SLICES MARCH 1985-REVISED JANUARY 1986 • STL-AS Technology • Full Carry Look Ahead Support Parallel a-Bit ALU with Expansion Inputs and Outputs • Sign, Carry Out, Overflow, and Zero-Detect Status Capabilities 13 Arithmetic and Logic Functions


    Original     		PDF SN54AS888, SN74AS888 1985-REVISED SN74AS888 AS888 CI 4016 SN74AS888-1 srf 2338 "Overflow detection"

    addressing modes in adsp-21xx

    Abstract: i3 i5 i7 processor ADSP-2101 ADSP-2105 ADSP-2111 ADSP-2115 PMD70 "saturation instruction" "saturation" "instruction"
    Text: ALU ADD / ADD with CARRY Syntax: [ IF cond ] Permissible xops AX0 MR2 AX1 MR1 AR MR0 SR1 SR0 AR AF = xop Permissible yops AY0 AY1 AF + + + + + yop C yop + C constant constant + C 15 ; Permissible conds see Table 15.9 EQ LE AC NE NEG NOT AC GT POS MV GE AV


    Original     		PDF ADSP-217x, ADSP-218x, ADSP-21msp58/59 32bits addressing modes in adsp-21xx i3 i5 i7 processor ADSP-2101 ADSP-2105 ADSP-2111 ADSP-2115 PMD70 "saturation instruction" "saturation" "instruction"

    i3 i5 i7 processor

    Abstract: i5 instruction set addressing modes in adsp-21xx i3 processor M6 transistor m7 diode ADSP-2100 ADSP-2181
    Text: 15 Instruction Set Reference Multifunction Instructions <ALU>*† , <MAC>*† AX0 AX1 MX0 MX1 AX0 AX1 MX0 MX1 = DM <ALU>* <MAC>* <SHIFT>* = DM ( I0 I1 I2 I3 , dreg , , , , = I0 I1 I2 I3 , , , , M0 , M1 M2 M3 DM ( PM ( DM ( PM ( <ALU>* <MAC>* <SHIFT>* I0


    Original     		PDF

    A0-A13

    Abstract: D2322 P68AK
    Text: BACK a Low Cost DSP Microcomputers ADSP-2104/ADSP-2109 FUNCTIONAL BLOCK DIAGRAM SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/


    Original     		PDF 16-Bit ADSP-2104/ADSP-2109 ADSP-2104KP-80 ADSP-2109KP-80 ADSP-2104LKP-55 ADSP-2109LKP-55 68-Lead A0-A13 D2322 P68AK

    D2322

    Abstract: ADSP-2100 ADSP2104 ADSP-2104 ADSP-2104L ADSP-2109 eprom 2764 "vector instructions" saturation
    Text: a Low Cost DSP Microcomputers ADSP-2104/ADSP-2109 FUNCTIONAL BLOCK DIAGRAM SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/


    Original     		PDF ADSP-2104/ADSP-2109 16-Bit ADSP-2104KP-80 ADSP-2109KP-80 ADSP-2104LKP-55 ADSP-2109LKP-55 68-Lead D2322 ADSP-2100 ADSP2104 ADSP-2104 ADSP-2104L ADSP-2109 eprom 2764 "vector instructions" saturation

    0795a

    Abstract: Amu interface lode dsp galois ALU of 4 bit adder and subtractor
    Text: Features • Two multiplier accumulator units • • • • • • • • • • • • • • • • – Single cycle 16 x 16-bit signed and unsigned multiply - accumulate 40-bit arithmetic logical unit ALU Four 40-bit accumulators (32-bit + 8 guard bits)


    Original     		PDF 16-bit 40-bit 32-bit pipeli25 0795a Amu interface lode dsp galois ALU of 4 bit adder and subtractor

    ARM processor

    Abstract: ARM processor data sheet ARM PROCESSOR DATASHEET arm 5 datasheet arm 7 data sheet ARM710 ARM7500
    Text: 1 5 11 ARM Processor Instruction Set 5.1 Instruction set summary 5-2 5.2 The condition field 5-3 5.3 Branch and branch with link B, BL 5-4 5.4 Data processing 5-6 5.5 PSR transfer (MRS, MSR) 5-15 5.6 Multiply and multiply-accumulate (MUL, MLA) 5-20 5.7 Single data transfer (LDR, STR)


    Original     		PDF ARM7500 0050C ARM processor ARM processor data sheet ARM PROCESSOR DATASHEET arm 5 datasheet arm 7 data sheet ARM710

    arm processor

    Abstract: mcr 5102 basic architecture of ARM Processors ARM710 ARM7500FE PSR 57-3 Basic ARM hardware
    Text: 1 5 11 ARM Processor Instruction Set This chapter describes the ARM processor instruction set. 5.1 Instruction Set Summary 5-2 5.2 The Condition Field 5-2 5.3 Branch and Branch with Link B, BL 5-3 5.4 Data Processing 5-4 5.5 PSR Transfer (MRS, MSR) 5-13


    Original     		PDF ARM7500FE 0077B arm processor mcr 5102 basic architecture of ARM Processors ARM710 PSR 57-3 Basic ARM hardware

    ARM processor data sheet

    Abstract: ARM7 instruction set ARM processor ARM7100 specification of ldr SWP-1 ARM processors data sheet basic architecture of ARM Processors
    Text: 1 11 ARM Processor Instruction Set 5 5.1 Instruction Set Summary 5-2 5.2 The Condition Field 5-3 5.3 Branch and Branch with link B, BL 5-4 5.4 Data Processing 5-6 5.5 PSR Transfer (MRS, MSR) 5-15 5.6 Multiply and Multiply-Accumulate (MUL, MLA) 5-19 5.7 Single Data Transfer (LDR, STR)


    Original     		PDF ARM7100 ARM processor data sheet ARM7 instruction set ARM processor specification of ldr SWP-1 ARM processors data sheet basic architecture of ARM Processors

    2164 dynamic ram

    Abstract: ADSP-2165 ADSP-2100 ADSP-2101 ADSP-2103 ADSP-2161
    Text: a SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus and Dual Data Buses Independent Computation Units: ALU, Multiplier/ Accumulator and Shifter Single-Cycle Instruction Execution and Multifunction


    Original     		PDF 16-Bit ADSP-2166BS-52 ADSP-2166BS-66 80-Lead C3511 ADSP-2161KP-662 ADSP-2161BP-662 2164 dynamic ram ADSP-2165 ADSP-2100 ADSP-2101 ADSP-2103 ADSP-2161

    TA 7136 p

    Abstract: weitek 7137-100-G ad 7137
    Text: WTL 7137 32-BIT INTEGER PROCESSOR ADVANCE DATA Features 32-BIT, SINGLE-CHIP PROCESSOR o 3 2-bit Integer ALU o 4-port 36x32 Register File o Parallel Multiply/Divide Unit o 32-bit Shift/Field Merge Unit POWERFUL INSTRUCTION SET o Add, Subtract, Multiply, Divide


    OCR Scan     		PDF 32-BIT 32-BIT, 36x32 144-pin 120ns 100ns 7137-120-G 7137-100-G TA 7136 p weitek ad 7137

    weitek

    Abstract: P11000 ta 7136 AD27 AD29 AD30 32-bit-Integer weitek 7137 weitek 7136 TA 7136 p
    Text: WTL 7137 32-BIT INTEGER PROCESSOR ADVANCE DATA APRIL, 1986 Features 32-BIT, SINGLE-CHIP PROCESSOR o 3 2-bit Integer ALU o 4-port 36x32 Register File o Parallel Multiply/Divide Unit o 32-bit Shift/Field Merge Unit POWERFUL INSTRUCTION SET o Add, Subtract, Multiply, Divide


    OCR Scan     		PDF 32-BIT 32-BIT, 36x32 144-pin 120ns 7137-120-GCD 100ns 7137-100-GCD weitek P11000 ta 7136 AD27 AD29 AD30 32-bit-Integer weitek 7137 weitek 7136 TA 7136 p

    TI L8236

    Abstract: weitek L-8237 XL-8200 l8236
    Text: XL-8237 32-BIT RASTER IMAGE PROCESSOR PRELIMINARY DATA M ay 1988 Features 32-BIT, SINGLE-CHIP GRAPHICS PROCESSOR HIGH PERFORMANCE 32-bit integer ALU Four-port 3 6 x 3 2 register file Parallel multiply/divide unit for Bezier computation 32-bit shift/field merge unit for BitBlt


    OCR Scan     		PDF XL-8237 32-BIT 32-BIT, 145-pin TI L8236 weitek L-8237 XL-8200 l8236

    XL-8137

    Abstract: Weitek xl-8137 XL8137
    Text: XL-8137 32-BIT INTEGER PROCESSING UNIT DATA SHEET January 1989 Features 32-BIT, SIN G LE-CH IP PROCESSOR THREE-ADDRESS ARCHITECTURE 32-bit Integer ALU F our-port 36x32 Register File Parallel M ultiply/Divide Unit 32-bit Shift/Field M erge U nit Source an d destination registers are specified independ­


    OCR Scan     		PDF XL-8137 32-BIT 32-BIT, 36x32 XL-8137 Weitek xl-8137 XL8137

    RRUS 32

    Abstract: RRUS 32 b2 RRUS 01 B1 RRUS 01 B2 2101S 68000 thomson
    Text: fi?]> D S G S-THONSON 87D 08679 D § 7cl5cia37_DDDflt17c] r - i f j - n . o s - TS68930 • TS68931 ADVANCE INFORMATION HMOS2 The T S 68930/1 Programmable S ignal Processor is a high-speed general purpose signal and arithm etic processo'r w ith on-chip memory, m u ltip lier, ALU, accumulators and l/O s . It is organized in


    OCR Scan     		PDF TS68930 TS68931 16-bit 32-bit 48-pin 84-pinflou RRUS 32 RRUS 32 b2 RRUS 01 B1 RRUS 01 B2 2101S 68000 thomson

    Untitled

    Abstract: No abstract text available
    Text: TMS320F206 DIGITAL SIGNAL PROCESSOR S PR S050-N O VEM BER 1996 H i g h - P e r f o r m a n c e Static C M O S T e c hn o l o g y • 3 2- Bi t ALU / A c c u m u l a t o r • I n c l ud e s the T 3 2 0 C 2 x L P Cor e CPU • 16 x 1 6- Bi t Mul t i pl i er With a 3 2- Bi t P r o d u c t


    OCR Scan     		PDF TMS320F206 S050-N 00-Pin

    4057A

    Abstract: CD4057AD CD4057A CD4067A
    Text: 4û 5'7A CD4057A Types CMOS LSI 4-Bit Arithmetic Logic Unit The RCA-CD4057A is a low-power arithme­ tic logic unit ALU designed for use in LSI computers. An arithmetic system of virtually any size can be constructed by wiring to­ gether a number of CD4057A ALU's. The


    OCR Scan     		PDF RCA-CD4057A CD4057A CD4067A CD4057A. 4057A CD4057AD

    kbaa

    Abstract: amd 2901 alu weitek FPU wtl3332 weitek WTL3164 amd 2901 Kaaa 3332 weitek CRTN 1010
    Text: / CHRIS1 EMBEDDED PROCESSOR UNIT EPU February 1988 FEATURES • 32-Bit RISC Architecture • 2901 ALU Superset • 20 MIPS Throughput • 32-Bit ALU or 2 16-Bit ALUs • Executes 1 1nstruction/Cycle • 2910 Sequencer Superset • 3Kb WCS Instruction Cache


    OCR Scan     		PDF 32-Bit 11nstruction/Cycle 96-Bit 32-Barrel 16-Bit 24-Bit kbaa amd 2901 alu weitek FPU wtl3332 weitek WTL3164 amd 2901 Kaaa 3332 weitek CRTN 1010

    addressing modes in adsp-21xx

    Abstract: ADSP21XX block diagram addressing modes of adsp 21xx processors direct addressing mode in adsp-21xx EPROM 2764 ADSP-21xx block diagram ADSP-2106
    Text: ANALOG DEVICES ADSP-2100 Family DSP Microcomputers ADSP-21XX FUNCTIONAL BLOCK DIAGRAM SUM M ARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/


    OCR Scan     		PDF 16-Bit ADSP-2111 addressing modes in adsp-21xx ADSP21XX block diagram addressing modes of adsp 21xx processors direct addressing mode in adsp-21xx EPROM 2764 ADSP-21xx block diagram ADSP-2106

    RRUS 01 B1

    Abstract: RRUS 32 b2 RRUS 01 B2 ocular lcd e purse TS68930 TS68931 TSSB831 RRUS 01 3BS1
    Text: T S 6 8 9 3 0 • T S 68931 ADVANCE INFORMATION HMOS2 The T S 6 8 9 3 0 /1 Programmable Signal Processor is a high-speed general purpose signal and arithm etic processor w ith on-chip memory, m ultiplier, ALU, accumulators and I/O s . It is organized in


    OCR Scan     		PDF TS68930 TS68931 TS68930/1 16-bit 32-bit 48-pin 84-pin RRUS 01 B1 RRUS 32 b2 RRUS 01 B2 ocular lcd e purse TS68930 TS68931 TSSB831 RRUS 01 3BS1

    Intel 82750

    Abstract: No abstract text available
    Text: inU 82750PB PIXEL PROCESSOR • 25 MHz Clock with Single Cycle Execution ■ Zero Branch Delay ■ Wide Instruction Word Processor ■ 512 x 48-Bit Instruction RAM ■ 512 x 16-Bit Data RAM ■ Two Internal 16-Bit Buses ■ ALU with Dual-Add-Wlth-Saturation


    OCR Scan     		PDF 82750PB 48-Bit 16-Bit 32-Bit 132-Pin 82750PA 82750PB 132-lead 132-Lead Intel 82750

    HA 13645

    Abstract: CD4067A cd4057 CD4057AH CD4057AD CD4057AK CD40B IMD14 transistor s912 16 bit alu circuit design
    Text: HARRIS SEMICOND SECTOR 37E D M3G2271 DÜSIMST S « H A S 3875081 G E SOLID STATE 0 1E 13645 T - m - n CD4057A Types CMOS LSI 4-Bit Arithmetic Logic Unit The RCA-CD4057A is a low-power arithme­ tic logic unit ALU designed for use in LSI computers. An arithmetic system of virtually


    OCR Scan     		PDF M3G2271 CD4057A RCA-CD4057A 92CS-20972 92CS19949R2 92CS-I727IR3 HA 13645 CD4067A cd4057 CD4057AH CD4057AD CD4057AK CD40B IMD14 transistor s912 16 bit alu circuit design

    HA 13645

    Abstract: CD4057 cd4057a
    Text: HARRIS SEMICOND SECTOR 37E D M3G2271 DÜSIMST S « H A S 3875081 G E SOLID STATE 0 1E 13645 T - m - n CD4057A Types CMOS LSI 4-Bit Arithmetic Logic Unit The RCA-CD4057A is a low-power arithme­ tic logic unit ALU designed for use in LSI computers. An arithmetic system of virtually


    OCR Scan     		PDF M3G2271 CD4057A RCA-CD4057A 28-Lead HA 13645 CD4057

    5-pin BMS

    Abstract: 27c256 plcc "vector instructions" saturation T 2109
    Text: ANALOG DEVICES Low Cost DSP Microcomputers ADSP-2104/ADSP-2109 FUNCTIONAL BLOCK DIAGRAM SUM M A RY 16-Bit Fixed-Point D SP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/


    OCR Scan     		PDF 16-Bit 005032b ADSP-2104/ADSP-2109 68-Lead P-68A 5-pin BMS 27c256 plcc "vector instructions" saturation T 2109