WEITEK Search Results

XO-31

Abstract: AAD00-AAD04 wtl3164 weitek NS32580-30 NS32081
Contextual Info: PRELIMINARY NS32580-20/NS32580-25/NS32580-30 Floating Point Controller G eneral Description The NS32580 Floating-Point Controller FPC is an interface device designed to couple the NS32532 Microprocessor with the Weitek WTL 3164 Floating-Point Data Path (FPDP).

mab16

Abstract: W5086
Contextual Info: W5086 USER INTERFACE CONTROLLER PRELIMINARY July 1991_ 1. Technical Overview 1.1. Features WINDOWS ACCELERATOR WEITEK-supplied AutoCAD device drivers allow Auto­ CAD to take advantage of these features automatically

weitek 3164

Abstract: WTL-3164-15 weitek FPU weitek AADD CA001 NS32532 t03h 32580-WTL3164 R4X20
Contextual Info: PRELIM INARY NS32580-20/NS32580-25/NS32580-30 Floating Point Controller G eneral Description The NS32580 Floating-Point Controller FPC is an interface device designed to couple the NS32532 Microprocessor with the Weitek WTL 3164 Floating-Point Data Path (FPDP).

RT5014

Abstract: NS32081 BC-NB weitek S3258 e9421
Contextual Info: PRELIMINARY NS32580-20/NS32580-25/NS32580-30 Floating Point Controller General Description The NS32580 Floating-Point Controller FPC is an interface device designed to couple the NS32532 Microprocessor with the Weitek WTL 3164 Floating-Point Data Path (FPDP).

weitek xl-3132

Abstract: XL-8137 XL-3132 weitek 3332-100 3332 weitek weitek 2264 weitek 3332-G weitek 3132 XL-8136
Contextual Info: üJEITEK CÔRP GS WEITEK Jk A D E B IbbBflab DOOOiib < WTL 3132/WTL 3332 XL-3132 32-BIT FLOATING POINT DATAPATH PRELIMINARY DATA October 1987 The WEITEK WTL 3132, WTL 3332, and XL-3132 single-chip floatingpoint datapathseachoffer a full instruction set, includingmulti­

Contextual Info: UEiTEK WEITEK A coRP id de | ib b aaat DG DC m ai 5 WTL2517 PARALLEL ARRAY MULTIPLIER July, 1986 c The Weitek WTL 2517 is a 16x16 integer multiplier. It offers very high performance, with speeds of up to 38 ns. The WTL 2517 is compati­ ble with industry standard pin con­

Contextual Info: WEITEK Â VIDEO POWER DATA BOOK a PRELIMINARY DATA February 28, 1994_ W EITEK’s Video Power is a video copro­ cessor th at m akes TV-quality digital video possible on desktop PC’s running Video for W indow s, and in other GUI-based multim edia environm ents. Unlike unaccelerated

80486 microprocessor block diagram and pin diagram

Abstract: architecture of 80486 microprocessor 80486 microprocessor features architecture of 80486 block diagram of processor 80486 80486 microprocessor 80486 microprocessor block diagram 80486 architecture 80486 microprocessor pin diagram 80486 microprocessor description
Contextual Info: CHIPSET FOR 80486 MICRO CHANNEL COMPUTER SYSTEMS FEATURES • SLIK architecture supports the 80486 microprocessor Supports Weitek 4167 math coprocessor • Five chip implementation of a Micro Channel computer system: Hardware and Software compatible with IBM’s Micro

weitek

Abstract: weitek 1167
Contextual Info: WEITEK Á WTL1164/WTL1165 64-BIT IEEE FLOATING POINT MULTIPLIER/ DIVIDER AND ALU a PRELIMINARY DATA Ju ly 1986 T h e W T L 1164 F lo a tin g P o in t M u ltip lie r and the W T L 1165 F lo a t­ in g P o in t A L U a re o p tim iz e d f o r flo a tin g p o int c o p ro c e s s o r a p p lic a ­

intel 4004

Abstract: weitek 386SX AN100 AN89 1536kb
Contextual Info: 65554 Mode Support for the HiQV64 Controllers Application Note Revision 1.0 April 1996 P R E L I M I N A R Y  Copyright Notice Copyright 1996 Chips and Technologies, Inc. ALL RIGHTS RESERVED. This manual is copyrighted by Chips and Technologies, Inc. You may not reproduce, transmit,

Contextual Info: AT40491/2 Features • Two-Chip PC/AT Compatible Chip Set for 80486 Based Systems of up to 33 MHz AT40491 System Controller AT40492 Data Buffer Controller Two 160-Pin Quad Flatpacks, 1-Micron CMOS Process On-Chip Support For Direct-mapped Copy-back Cache Supports 2,1,1,1 and 3,1,1,1 Cache Burst Cycles

SDC40

Contextual Info: WESTERN DIGITAL CORP =1710220 0001=205 T SIE D Advance Information EE6030 Cache/DRAM and Channel Control Device Complete compatibility with the IBM* Personal System/2* Models 70 and 80 Direct-Mapped Cache Controller Includes the following: Page Mode DRAM Controller

ITE 8721

Abstract: fnd 503 7-segment TAA 2761 A 486 motherboard schematic 3860S 486dx isa bios pin assignment RAS 0510 cxd 9897 tn ti77 k244
Contextual Info: ISA/486 C H |p g . CepyTlgtt N ette S o t t r a e C o p y ñ f tt O 1962, a * « * d T e d » a i e s i e * . l w x M t o n i I C o p y r i i h t O 1992 . Q ñ p » » d T c c t n o f a p B » , ! ^ . A B SIduR am i Poned ib UJ5A. Tw dw u U t h w lw lgim iil

circuit diagram of programmable LED chaser

Abstract: MINISCRIBE 486 MOTHERBOARD MYLEX INTEL I486 DX2 LED chaser i486 DX2 Mylex performance benchmarks mylex conner disk drive pcb MVE486
Contextual Info: MVE486 System Board Installation and Operations Guide P/N: 771917-DO1 Version DO1 March, 1993 MVE System Board Preface PREFACE Thank you for your choice of a Mylex MVE486 System Board product. With proper installation and care, your Mylex System Board will operate

chips 65554

Abstract: F65554 HiQV64 SE655 386SX BMP554 OC65554 1.5 128x128 Color LCD 4F15 horizontal section in crt television
Contextual Info: OC65554 HiQV64 Series VGA BIOS OEM Reference Guide Revision 1.0 September 1996 P R E L I M I N A R Y  Copyright Notice Copyright 1996 Chips and Technologies, Inc. ALL RIGHTS RESERVED. This manual is copyrighted by Chips and Technologies, Inc. You may not reproduce, transmit,

486 motherboard schematic

Abstract: 486dx2 pinouts 486DX2 486dx schematic 4021-A TL05A Super386 t187 T106B J7 CHIPS TECHNOLOGIES
Contextual Info: CHIPS & TECHNOLOGIES INC SIE D • SO Töllb DDOSSba 4ÖT M C H P 9000-380 8 CHIPS CHIPS & TECHNOLOGIES INC S1E » ■ EQTflllb □□□PPbM 31S MCHP T -v 1 -1 7 -0 1 Copyright Notice Software Copyright 1992, Chips and Technologies, Inc. Manual Copyright © 1992, Chips and Technologies, Inc.

Contextual Info: WTL 2516/2516A/2516B/2516C PARALLEL ARRAY MULTIPLIER PRELIMINARY DATA APRIL, 1986 Features SELECTABLE O U TPU T M ODE 16 x 16 PA R A LLEL ARRAY M U LTIPLIER O utput latch m ode selectable for clocked or transpar­ ent operation LOW P O W E R k C M O g ^ IT H T T L C O M PA TIB LE I/O

80387

Abstract: weitek 85C320 85C330 3i bios chip 80386 85C310 cache controller pipeline architecture for 80386 21U9
Contextual Info: SIS 85C310 _ Cache/Memory Controller Rev 1.1 Preliminary FEATURES • 25/33MHz Non-Pipeline Operation • Built-in Direct Mapped Cache Controller for 32K/64K/128K/256K Cache or More

VIA SL9011

Contextual Info: The FlexSet PC/AT System Controller SL9011 PRELIMINARY FEATURES • AT System Control Logic. • Supports 80286,80386SX P9 , or 80386DX-based Designs. • Up to 25 MHz Performance. • Clock Switching and Reset Logic. • Programmable Wait States for 8 Bit AT Cycles.

Contextual Info: WTL 2245/2245A/2245B PARALLEL ARRAY MULTIPLIER/ACCUMULATOR PRELIMINARY DATA July 1986 Features FULL PRODUCT MULTIPLEXED AT OUTPUT 16 x 16-BIT PARALLEL M ULTIPLICATION AND PRODUCT ACCUMULATION PIN-FOR-PIN REPLACEMENT FOR AM 29510, TDC 1010J, WTL 1010 AND WTL 2010 EXCEPT

gcu 101 setting manual

Abstract: intel 8220 xl8220
Contextual Info: XL-8220 PROCESSOR DATA BOOK PRELIMINARY DATA March 1990 Chapter 1. Overview 1.1. Features C O ST -EFFEC T IV E P R IN TE R P R O C E SSO R IN T EG R A TED SY ST EM FU N C T IO N S 32-bit RISC processor for PostScript-language page printers Zero-glue D R A M memory controller

NEC mr22-24

Abstract: chips 65554 65554 cga to vga converter i387 MR22-24 schematic diagram cga to vga converter MR20-3F FR37 386SX notebook
Contextual Info: 65554 High Performance Flat Panel/ CRT GUI Accelerator Data Sheet Revision 1.1 January 1997  Copyright Notice Copyright 1997 Chips and Technologies, Inc. ALL RIGHTS RESERVED. This manual is copyrighted by Chips and Technologies, Inc. You may not reproduce,

scheme tv color nippon

Abstract: schematic diagram cga to vga converter 65554 bitblt raster cga ega vga chips 65554 Font 16x32 dot font FR37 HiQV64 386SX notebook
Contextual Info: 65554 High Performance Flat Panel/ CRT GUI Accelerator Data Sheet Revision 0.3 June 1996 P R E L I M I N A R Y  65554 High Performance Flat Panel/ CRT GUI Accelerator Data Sheet Revision 0.3 June 1996 P R E L I M I N A R Y  Copyright Notice Copyright 1996 Chips and Technologies, Inc. ALL RIGHTS RESERVED.

t65101

Abstract: t65100 SiI100 386SX notebook NEC Multisync manual chips 65100 computer motherboard circuit diagram 486 HERCULES Graphics Controller t65100 386SX SiI101
Contextual Info: 65100/101 PanelLink Technology High Speed Transmitter and Receiver Data Sheet Revision 0.7 December 1996 ADVANCE PRODUCT INFORMATION  Copyright Notice Copyright 1996 Chips and Technologies, Inc. ALL RIGHTS RESERVED. This manual is copyrighted by Chips and Technologies, Inc. You may not reproduce, transmit,