001224B Search Results

Contextual Info: DALLAS SEMICONDUCTOR DS2187 Receive Line Interface FEATURES PIN ASSIGNMENT • Line interface for T1 1.544 MHz and CEPT (2.048 MHz) primary rate networks 3D 3D ID 3D 3D 3D 3D 3D 3D 3D AVDD Œ RAIS QE • Extracts clock and data from twisted pair or coax

HP3330B

Contextual Info: SILICONIX INC 03 8254735 SILICONIX DiEJ ÛBS4735 0015H40 1 INC 03E 12240 DG400-405 Low-Power - High-Speed CMOS Analog Switches j y Silîconlx Incorporated T-51-11 FEATURES BENEFITS APPLICATIONS • +15. V Input Range • Wide Dynamic Range • ON Resistance < 35 Cl

Contextual Info: r JB r u êêm J n t A LT1130A/LT1140A Series ß TECHNOLOGY A d v a n c e d Low Power 5V RS232 Drivers/Receivers w ith Small C ap a citors F€flTU߀S DCSCMPTIOn • ESD Protection over ±1OkV ±15kV for LT1137A ■ Uses Small Capacitors: 0.1 pF, 0.2pF

Contextual Info: MT4LC2M8B1 S 2 MEG X 8 DRAM MICRON I TECHNOLOGY. INC DRAM 2 MEG x 8 DRAM 3.3V, FAST PAGE MODE, OPTIONAL SELF REFRESH PIN ASSIGNMENT (Top View) • JEDEC- and industry-standard x8 pinouts, tim ing, functions a n d packages • H igh-perform ance CMOS silicon-gate process

ks 4290 industrial controller

Abstract: AKA NF 028 ATT2C12 ATT ORCA fpga ATT2C08 ATT2C15 52833 trw 2015 ptc ei 8n CODE PJ 62-00
Contextual Info: Preliminary Data Sheet January 1995 AT&T Microelectronics Optimized Reconfigurable Cell Array ORCA 2C Series Field-Programmable Gate Arrays Features • High density: 3,500 to 26,000 usable gates ■ High I/O: up to 384 usable I/O ■ High-performance 0.5 (xm CMOS technology