001AAH Search Results

BA978

Abstract: 101-FA BA9788 TA946 TA-946 pdmi JS0242 001H 92193-001 475t
Contextual Info: 1 REV A B C D E F G H J PRODUCT NO. 92193 PRODUCT NO. STAND A A A A A 92193—XXXXXX OFF mm OOOAA OOOCA OOOCAH OOOCB OOOCBH 001AA 001AAH 001CA 001CAH 001 FA 00 1 FAH 002CA 002CAH 020CA 2 040CA 4 050CA 5 050CAH 5 100CA 1OOCAH 101CA 101CAH 1m fa n 101FAH n

74HCT25

Contextual Info: 74HC259; 74HCT259 8-bit addressable latch Rev. 5 — 7 August 2012 Product data sheet 1. General description The 74HC259; 74HCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC

nz104

Contextual Info: 74LVC2G66 Bilateral switch Rev. 7 — 22 June 2012 Product data sheet 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input (nE).

Contextual Info: 74HC237 3-to-8 line decoder, demultiplexer with address latches Rev. 6 — 23 August 2012 Product data sheet 1. General description The 74HC237 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL LSTTL . The 74HC237 is specified in compliance with JEDEC

MARKING V7 6-PIN

Contextual Info: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 11 — 6 July 2012 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.

Marking code V7

Contextual Info: 74LVC2G00 Dual 2-input NAND gate Rev. 11 — 22 June 2012 Product data sheet 1. General description The 74LVC2G00 provides a 2-input NAND gate function. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

P8563

Abstract: NXP 8563T 8563t PCF8563T PCF8563P 8563S
Contextual Info: PCF8563 Real-time clock/calendar Rev. 10 — 3 April 2012 Product data sheet 1. General description The PCF8563 is a CMOS1 Real-Time Clock RTC and calendar optimized for low power consumption. A programmable clock output, interrupt output, and voltage-low detector are

74hc733

Abstract: 74HC73 74HC73N 74HC73D 74HC73DB 74HC73PW JESD22-A114E SSOP14 SSOP14 package
Contextual Info: 74HC73 Dual JK flip-flop with reset; negative-edge trigger Rev. 04 — 19 March 2008 Product data sheet 1. General description The 74HC73 is a high-speed Si-gate CMOS device that complies with JEDEC standard no. 7A. It is pin compatible with Low-power Schottky TTL LSTTL .

74LVT245B

Abstract: 74LVT245BBQ 74LVT245BD 74LVT245BDB 74LVT245BPW JESD22-A114E SO20 SSOP20 MNA175
Contextual Info: 74LVT245B 3.3 V octal transceiver with direction pin 3-state Rev. 02 — 8 May 2008 Product data sheet 1. General description The 74LVT245B is a high-performance BiCMOS product designed for VCC operation at 3.3 V. This device is an octal transceiver featuring non-inverting 3-state bus compatible outputs

74AHC139

Abstract: 74AHCT139 74AHC139D 74AHC139PW HE4000B
Contextual Info: 74AHC139; 74AHCT139 Dual 2-to-4 line decoder/demultiplexer Rev. 02 — 9 May 2008 Product data sheet 1. General description The 74AHC139; 74AHCT139 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

JESD22-A114E

Abstract: NX3L1G53GD NX3L1G53GM NX3L1G53GT
Contextual Info: NX3L1G53 Low-ohmic single-pole double-throw analog switch Rev. 03 — 17 April 2009 Product data sheet 1. General description The NX3L1G53 provides one low-ohmic single-pole double-throw analog switch, suitable for use as an analog or digital multiplexer/demultiplexer. It has a digital select input S ,

74LVC1G53

Abstract: 74LVC1G53DC 74LVC1G53DP 74LVC1G53GD 74LVC1G53GT JESD22-A114E MO-187 V53 TSSOP8
Contextual Info: 74LVC1G53 2-channel analog multiplexer/demultiplexer Rev. 05 — 11 June 2008 Product data sheet 1. General description The 74LVC1G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device. The 74LVC1G53 provides one analog multiplexer/demultiplexer with a digital select

AHCT32

Abstract: 74AHC32 74AHC32BQ 74AHC32D 74AHC32PW 74AHCT32 TSSOP14
Contextual Info: 74AHC32; 74AHCT32 Quad 2-input OR gate Rev. 04 — 22 May 2008 Product data sheet 1. General description The 74AHC32; 74AHCT32 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

74AUP2G125

Abstract: 74AUP2G125DC 74AUP2G125GT JESD22-A114E JESD78
Contextual Info: 74AUP2G125 Low-power dual buffer/line driver; 3-state Rev. 05 — 2 February 2009 Product data sheet 1. General description The 74AUP2G125 provides the dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input nOE . A HIGH level at pin nOE

74LVC3G14

Abstract: 74LVC3G14DC 74LVC3G14DP 74LVC3G14GM 74LVC3G14GT JESD22-A114E MO-187
Contextual Info: 74LVC3G14 Triple inverting Schmitt trigger with 5 V tolerant input Rev. 07 — 12 June 2008 Product data sheet 1. General description The 74LVC3G14 provides three inverting buffers with Schmitt trigger action. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of

HSVON10

Abstract: nxp pcf2120 HVSON10 JESD22-A114 JESD22-A115 JESD78 MO-229 PCF2120TK PCF2120U
Contextual Info: PCF2120 Quartz oscillator Rev. 01 — 5 February 2008 Product data sheet 1. General description The PCF2120 is a CMOS quartz oscillator optimized for low power consumption. The 32 kHz output signal is gated using an enable signal. 2. Features • ■ ■ ■

schematic diagram power amplifier tda8950

Abstract: tda8950 AUDIO AMPLIFIER SCHEMATIC tda8950j tda8950 external oscillator circuit TDA8950TH CLASS D AUDIO AMPLIFIER TDA8950 home voltage stabilizer schematic diagram free home theater 7.1 circuit diagram tda8950 circuit tda8920b
Contextual Info: TDA8950 2 x 150 W class-D power amplifier Rev. 02 — 11 June 2009 Product data sheet 1. General description The TDA8950 is a high-efficiency Class D audio power amplifier. The typical output power is 2 × 150 W with a speaker load impedance of 4 Ω. The TDA8950 is available in both HSOP24 and DBS23P power packages. The amplifier

TDA19978

Abstract: 702 Z TRANSISTOR smd hdmi splitter VGA to HDMI converter ic VGA to HDMI ic UDA1334BTS 702 Z smd TRANSISTOR bt 1840 HDMI to vga converter ic TDA19978A
Contextual Info: TDA19978A Quad HDMI 1.3a receiver interface with equalizer HDTV up to 1080p, up to UXGA for PC formats Rev. 02 — 18 August 2008 Objective data sheet 1. General description The TDA19978A is a four input HDMI 1.3a compliant receiver with embedded EDID memory. The built in auto-adaptive equalizer improves signal quality and allows the use of

74HC259

Abstract: 74HCT259 74LV259 74LV259BQ 74LV259D 74LV259DB 74LV259N 74LV259PW JESD22-A114E
Contextual Info: 74LV259 8-bit addressable latch Rev. 03 — 2 January 2008 Product data sheet 1. General description The 74LV259 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC259 and 74HCT259. The 74LV259 is a high-speed 8-bit addressable latch

TDA19977

Abstract: tda19977a diagram tv Philips plasma 42 logic board hdmi splitter HDMI to vga converter ic transistor bt 808 ws dvd 290 CEA-861-D HLQFP144 UDA1334BTS
Contextual Info: TDA19977A; TDA19977B Triple input HDMI 1.3a compliant receiver interface with equalizer up to 1080p for HDTV, and UXGA for PC formats Rev. 01 — 7 August 2008 Product data sheet 1. General description The TDA19977A; TDA19977B is a three input HDMI 1.3a compliant receiver with

bav40

Abstract: IP4778CZ38 TSSOP38
Contextual Info: IP4778CZ38 HDMI ESD protection, DDC buffering and hot plug control Rev. 02 — 12 February 2009 Product data sheet 1. General description The IP4778CZ38 is designed for HDMI receiver host interface protection. The IP4778CZ38 includes DDC buffering, slew rate acceleration and decoupling, Hot Plug

2A5-10

Abstract: 74AHC02BQ 74AHC02 74AHC02D 74AHC02PW 74AHCT02 TSSOP14
Contextual Info: 74AHC02; 74AHCT02 Quad 2-input NOR gate Rev. 04 — 21 May 2008 Product data sheet 1. General description The 74AHC02; 74AHCT02 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

BLF6G22-180PN

Contextual Info: BLF6G22-180PN Power LDMOS transistor Rev. 02 — 23 April 2008 Product data sheet 1. Product profile 1.1 General description 180 W LDMOS power transistor for base station applications at frequencies from 2000 MHz to 2200 MHz. Table 1. Typical performance RF performance at Tcase = 25 °C in a common source class-AB production test circuit.

74LVC2G66

Abstract: 74LVC2G66DC 74LVC2G66DP 74LVC2G66GT 74LVCV2G66 JESD22-A114E JESD78
Contextual Info: 74LVC2G66 Bilateral switch Rev. 04 — 1 July 2008 Product data sheet 1. General description The 74LVC2G66 is a low-power, low-voltage, high-speed Si-gate CMOS device. The 74LVC2G66 provides two single pole, single-throw analog switch functions. Each switch has two input/output terminals nY and nZ and an active HIGH enable input (nE).