74HC259 Search Results

74HCT25

Contextual Info: 74HC259; 74HCT259 8-bit addressable latch Rev. 5 — 7 August 2012 Product data sheet 1. General description The 74HC259; 74HCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC

74HC259

Abstract: 74HCT259 74LV259 74LV259BQ 74LV259D 74LV259DB 74LV259N 74LV259PW JESD22-A114E
Contextual Info: 74LV259 8-bit addressable latch Rev. 03 — 2 January 2008 Product data sheet 1. General description The 74LV259 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC259 and 74HCT259. The 74LV259 is a high-speed 8-bit addressable latch

74HCT259

Abstract: 74HC259 CD54HC259F3A CD54HCT259F3A CD74HC259E CD74HC259M HC259 HCT259
Contextual Info: [ /Title CD74 HC259 , CD74 HCT25 9 /Subject (High Speed CMOS Logic 8-Bit Addres sable Latch) CD54/74HC259, CD54/74HCT259 Data sheet acquired from Harris Semiconductor SCHS173A High Speed CMOS Logic 8-Bit Addressable Latch November 1997 - Revised May 2000

74HC259

Abstract: DL129 HC259 LS259 MC74HCXXXD MC74HCXXXN 74HC259D
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC54/74HC259 8-Bit Addressable Latch 1-of-8 Decoder High–Performance Silicon–Gate CMOS The MC54/74HC259 is identical in pinout to the LS259. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are

STATE01

Contextual Info: r G E SOLI» STATE Dl File Number D E * 3Ö7SDÖ1 G0117S5 1 .Technical Data CD54/74HC259 CD54/74HCT259 1727 T -V é -û 7 -o 5 High-Speed CMOS Logic 8-Bit Addressable Latch Type Features: • Buffered inputs and outputs ■ Four operating modes ■ Typical propagation delay o f 15 ns @ Vcc = 5 V,

74HC259

Abstract: hc259
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C54/74HC259 8 - Bit Addressable Latch 1 -o f-8 Decoder High-Performance Silicon-Gate CMOS J SUFFIX CERAMIC PACKAGE CASE 620-10 The MC54/74HC259 is identical in pinout to the LS259. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are

74HCT259

Abstract: 74HC259N 74HCT259D 74HC259 74HC259D 74HC259DB 74HCT259N JESD22-A114E
Contextual Info: 74HC259; 74HCT259 8-bit addressable latch Rev. 04 — 25 February 2009 Product data sheet 1. General description The 74HC259; 74HCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC

Contextual Info: 74HC259-Q100; 74HCT259-Q100 8-bit addressable latch Rev. 1 — 30 July 2012 Product data sheet 1. General description The 74HC259-Q100; 74HCT259-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with

L129

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8 - Bit Addressable Latch 1 -of-8 Decoder MC54/74HC259 High-Performance Silicon-Gate CMOS J SUFFIX CERAM IC PACKAGE CASE 6 2 0 -1 0 The MC54/74HC259 is identical in pinout to the LS259. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are

hc259

Contextual Info: MOTOROLA H SEMICONDUCTOR TECHNICAL DATA MC54/74HC2 59 Advance Information 8-Bit Addressable Latch 1 -of-8 Decoder J SUFFIX CERAMIC CASE 620-09 High-Performance Silicon-Gate C M O S N SUFFIX PLASTIC CASE 648-08 The MC54/74HC259 is identical in pinout to the LS259. The device inputs are

Contextual Info: 74HC259; 74HCT259 8-bit addressable latch Rev. 03 — 8 January 2009 Product data sheet 1. General description The 74HC259; 74HCT259 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL LSTTL . It is specified in compliance with JEDEC standard

Contextual Info: Technical Data CD54/74HC259 CD54/74HCT259 File Number 1727 HARRIS SEMICOND SECTOR 27E D M302271 0017742 2 S H A S T-lp'l'Z I"56 High-Speed CMOS Logic 8-Bit Addressable Latch Type Features: • Buffered inputs and outputs ■ Four operating modes ■ Typical propagation delay of 15 ns @ Vcc = 5 V,

Contextual Info: Technical Data File Number CD54/74HC259 CD54/74HCT259 1727 High-Speed CMOS Logic 8-Bit Addressable Latch Type Features: • Buffered inputs and outputs ■ Four operating modes ■ Typical propagation delay o f 15 ns @ Vcc = 5 V, Cl = 15 pF, T* = +25°C F U N C T IO N A L D IA G R A M

74HC259

Contextual Info: [ /Title CD74 HC259 , CD74 HCT25 9 /Subject (High Speed CMOS Logic 8-Bit Addres sable Latch) CD54/74HC259, CD54/74HCT259 Data sheet acquired from Harris Semiconductor SCHS173A High Speed CMOS Logic 8-Bit Addressable Latch November 1997 - Revised May 2000

74HC259

Abstract: 54HC 74HC M54HC259 M74HC259 IC 74Hc259
Contextual Info: Ii M 54HC259 M 74HC259 SGS-THOMSON m 8 BIT ADDRESSABLE LATCH HIGH SPEED tpo = 13 ns TYP. at V c c = 5V LOW POW ER DISSIPATION ICC = 4 ixA (MAX.) at TA = 2 5 °C HIGH NOISE IM M U N ITY V n ih = VniL = 28 °/o V c c (MIN) OU TPUT DRIVE CAPABILITY 10 LSTTL LOADS

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview 8 - B it A d d re s s a b le L a tc h 1 -o f-8 D e c o d e r M C 5 4 /7 4 H C 2 5 9 A J SUFFIX CERAM IC PACKAGE CASE 6 2 0 -1 0 High-Performance Silicon-Gate CMOS The M C54/74HC259A is identical in pinout to the LS259. The device

HC259A

Abstract: 948F LS259 MC54HCXXXAJ MC74HCXXXAD MC74HCXXXAN
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview MC54/74HC259A 8-Bit Addressable Latch 1-of-8 Decoder J SUFFIX CERAMIC PACKAGE CASE 620–10 High–Performance Silicon–Gate CMOS 16 The MC54/74HC259A is identical in pinout to the LS259. The device inputs are compatible with standard CMOS outputs; with pullup resistors,

Contextual Info: 74HC259; 74HCT259 8-bit addressable latch Rev. 5 — 7 August 2012 Product data sheet 1. General description The 74HC259; 74HCT259 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with JEDEC

HC259

Abstract: LS259 DL129 MC74HCXXXD MC74HCXXXN 3341 equivalent 74hc259
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8 -B it Addressable Latch 1 -o f-8 Decoder M C54/74HC259 High-Performance Silicon-Gate CMOS J SUFFIX CERAMIC PACKAGE CASE 620-10 The MC54/74HC259 is identical in pinout to the LS259. The dévice inputs are compatible with standard CMOS outputs; with pullup resistors, they are

74HCT259

Abstract: 74LV259 74LV259BQ 74LV259D 74LV259DB 74LV259N 74LV259PW JESD22-A114E 74HC259
Contextual Info: 74LV259 8-bit addressable latch Product data sheet 1. General description The 74LV259 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC259 and 74HCT259. The 74LV259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. The 74LV259 is

74hc259a

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA P roduct Preview MC54/74HC259A 8 -B it Addressable Latch 1 -o f-8 Decoder J SUFFIX CERAMIC PACKAGE CASE 620-10 High-Performance Silicon-Gate CMOS T h e M C 5 4 /7 4 H C 2 5 9 A is id e n tic a l in p in o u l to th e L S 2 5 9 . T h e d e v ic e

Contextual Info: 74HC259-Q100; 74HCT259-Q100 8-bit addressable latch Rev. 1 — 30 July 2012 Product data sheet 1. General description The 74HC259-Q100; 74HCT259-Q100 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL LSTTL . They are specified in compliance with

74HC9046

Abstract: 74hc128 74HCT4050 74HC1284 74hct133 74HCT4049 74HC7014 74hc164 74HC192 74HC93
Contextual Info: INTEGRATED CIRCUITS Package information Supersedes data of 1999 Jul 09 File under Integrated Circuits, IC06 1999 Sep 22 Philips Semiconductors Package information PACKAGE INFORMATION PART NO DIP N SO (D) SSOP (DB) TSSOP (PW) PIN COUNT 74HCU04 27-1 108-1

Contextual Info: 74HC259 8-bit addressable latch Datasheet - production data remain unaffected. With ENABLE in the high SO16 state, the device is deselected and all latches remain in their previous state, unaffected by changes on the data or address inputs. To eliminate the possibility of entering erroneous