002AAA376 Search Results

DDR2-667

Abstract: SSTUA32864 SSTUA32866 SSTUA32S865 TFBGA160
Contextual Info: SSTUA32S865 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications Rev. 02 — 16 March 2007 Product data sheet 1. General description The SSTUA32S865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four 2R x 4 and similar high-density Double Data Rate 2 (DDR2) memory

SSTUA32864

Abstract: SSTUA32866
Contextual Info: SSTUG32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications Rev. 01 — 23 April 2007 Product data sheet 1. General description The SSTUG32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

DDR2-800

Abstract: SSTUA32864 SSTUA32866 E6G3
Contextual Info: SSTUM32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 02 — 2 March 2007 Product data sheet 1. General description The SSTUM32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

Q1412

Abstract: ICS97ULP877 ICSSSTUBF32866A Q11A Q13A
Contextual Info: ICSSSTUBF32866A Advance Information Integrated Circuit Systems, Inc. 25-Bit Configurable Registered Buffer for DDR2 Pin Configuration Recommended Application: • DDR2 Memory Modules • Provides complete DDR DIMM solution with ICS97ULP877 • Ideal for DDR2 667, and 800

ULP877

Abstract: IDTCSPUA877A MO-205 SSTU32864 ICS97ULP877 ICS98ULPA877A ICSSSTUB32871A D0-D20
Contextual Info: ICSSSTUB32871A Integrated Circuit Systems, Inc. 27-Bit Registered Buffer for DDR2 Recommended Application: • DDR2 Memory Modules • Provides complete DDR DIMM solution with ICS98ULPA877A, ICS97ULP877, or IDTCSPUA877A • Optimized for DDR2 400/533/667 JEDEC 4 Rank

DDR2 DIMM 240 pinout

Abstract: DDR2-667 Q11A Q13A SSTUA32864 SSTUA32864EC 96-ball
Contextual Info: SSTUA32864 1.8 V configurable registered buffer for DDR2-667 RDIMM applications Rev. 01 — 12 May 2005 Product data sheet 1. General description The SSTUA32864 is a 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer designed for 1.7 V to 2.0 V VDD operation.

DDR2-667

Abstract: Q11A SSTUA32866 SSTUA32866EC
Contextual Info: SSTUA32866 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Rev. 01 — 15 July 2005 Product data sheet 1. General description The SSTUA32866 is a 1.8 V configurable register specifically designed for use on DDR2

Q11A

Abstract: Q13A SSTU32864 SSTU32864EC
Contextual Info: SSTU32864 1.8 V configurable registered buffer for DDR2 RDIMM applications Rev. 02 — 22 October 2004 Product data sheet 1. General description The SSTU32864 is a 25-bit 1:1 or 14-bit 1:2 configurable registered buffer designed for 1.7 V to 1.9 V VDD operation.

Contextual Info: SSTUG32866 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications Rev. 01 — 29 June 2007 Product data sheet 1. General description The SSTUG32866 is a 1.8 V configurable register specifically designed for use on DDR2

Contextual Info: SSTUB32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 04 — 22 April 2010 Product data sheet 1. General description The SSTUB32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

Contextual Info: SSTVF16859 13-bit 1 : 2 SSTL_2 registered buffer for DDR Rev. 02 — 19 July 2005 Product data sheet 1. General description The SSTVF16859 is a 13-bit to 26-bit SSTL_2 registered driver with differential clock inputs, designed to operate between 2.3 V and 2.7 V for PC1600-PC2700 applications or

Contextual Info: SSTUM32865 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-800 RDIMM applications Rev. 01 — 19 September 2007 Product data sheet 1. General description The SSTUM32865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four 2R x 4 and similar high-density Double Data Rate 2 (DDR2) memory modules. It

Contextual Info: ICSSSTUB32872A Integrated Circuit Systems, Inc. Advance Information 28-Bit Registered Buffer for DDR2 Recommended Application: • DDR2 Memory Modules • Provides complete DDR DIMM solution with ICS98ULPA877A, ICS97ULP877, or IDTCSPUA877A • Optimized for DDR2 400/533/667 JEDEC 4 Rank

PI74

Abstract: PI74SSTU32866 Q13A SN74SSTU32866 SSTU32866
Contextual Info: PI74SSTU32866 25-bit 1:1 or 14-bit 1:2 Configurable Registered Buffer with Parity Product Features Product Description • PI74 SSTU32866 is designed for low-voltage operation, VDD = 1.8V • Supports Low Power Standby Operation • All Inputs are SSTL_18 Compatible, except RST, C0, C1,

DDR2-800

Abstract: SSTUA32866 SSTUB32866 ic PRESSURE SENSOR
Contextual Info: SSTUP32866 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity and programmable output for DDR2-800 RDIMMs Rev. 02 — 14 September 2006 Product data sheet 1. General description The SSTUP32866 is a 1.8 V configurable register specifically designed for use on DDR2

A114

Abstract: JESD22 JESD78 PC3200 SSTV16859 SSTVF16859 TSSOP64
Contextual Info: SSTVF16859 13-bit 1 : 2 SSTL_2 registered buffer for DDR Rev. 02 — 19 July 2005 Product data sheet 1. General description The SSTVF16859 is a 13-bit to 26-bit SSTL_2 registered driver with differential clock inputs, designed to operate between 2.3 V and 2.7 V for PC1600-PC2700 applications or

PS8772

Contextual Info: PI74SSTUA32866 25-bit 1:1 or 14-bit 1:2 Configurable Registered Buffer with Parity Product Features Product Description • PI74SSTUA32866 is for low-voltage operation, VDD = 1.8V • Supports Low Power Standby Operation • All Inputs are SSTL_18 Compatible, except RST, C0, C1,

Contextual Info: SSTUB32865 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-800 RDIMM applications Rev. 03 — 27 March 2007 Product data sheet 1. General description The SSTUB32865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four 2R x 4 and similar high-density Double Data Rate 2 (DDR2) memory modules. It

Contextual Info: SSTUG32865 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-1G RDIMM applications Rev. 01 — 16 August 2007 Product data sheet 1. General description The SSTUG32865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four 2R x 4 and similar high-density Double Data Rate 2 (DDR2) memory modules. It

SSTU32864

Abstract: SSTU32865 SSTU32866 SSTUH32865 SSTUH32865ET
Contextual Info: SSTUH32865 1.8 V 28-bit high output drive 1:2 registered buffer with parity for DDR2 RDIMM applications Rev. 01 — 11 March 2005 Product data sheet 1. General description The SSTUH32865 is a 1.8 V 28-bit high output drive 1:2 register specifically designed for

CWQCCN IC PACKAGE

Abstract: SSTU32864 SSTU32866 SSTUH32866 SSTUH32866EC
Contextual Info: SSTUH32866 1.8 V high output drive 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2 RDIMM applications Rev. 01 — 13 May 2005 Product data sheet 1. General description The SSTUH32866 is a 1.8 V configurable register specifically designed for use on DDR2

Q22x

Abstract: Q5A H7
Contextual Info: SSTUM32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 01 — 12 September 2006 Product data sheet 1. General description The SSTUM32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

SMD capacitor aa4 aa5

Abstract: J2 Q24A B sot932 Q5A H7 TFBGA176
Contextual Info: SSTUB32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 02 — 12 September 2006 Product data sheet 1. General description The SSTUB32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

AA7 smd diode

Abstract: J2 Q24A B Q22x data sheet for all smd components diode smd m7 DDR2-800 SSTUA32864 SSTUA32866 Q20x SMD capacitor aa4 aa5
Contextual Info: SSTUB32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 04 — 22 April 2010 Product data sheet 1. General description The SSTUB32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank