02575EB Search Results

htw 323

Abstract: plji palce programming algorithm
Contextual Info: COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-15/25. Q-20/25 MIL: H-15/20/25 PALCE20V8 Family EE CMOS 24-Pin Universal Programmable Array Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Pin, function and fuse-map compatible with all GAL 20V8/AS ■ Electrically erasable CMOS technology pro­

Contextual Info: COM'L: -15/25 IND: -12/15/25 PALCE16V8Z FAMILY a Advanced Micro Devices Zero-Power 20-Pin EE CMOS Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Zero-Power CMOS technology — 15 nA Standby Current — 12 ns propagation delay for “-12” version

Contextual Info: COM’L: H-25 Advanced Micro Devices PALCE29M A16H-25 24-Pin EE CMOS Programmable Array Logic DISTINCTIVE CHARACTERISTICS • High-performance semicustom logic replacement; Electrically Erasable EE technology allows reprogrammability ■ 16 bidirectional user-programmable I/O logic

palce16v8 programming algorithm

Contextual Info: 5TE D • 02 57 5 2 b 00 32 2 7 1 510 MANDE ADV MICRO PLA/PLE/ARRAYS COM’L: H-7/10/15/25, Q-15/25 -_ MIL: H-10/15/20/25 PALCE16V8 Family AdvS EE CMOS 20-Pin Universal Programmable Array Logic Devices DISTINCTIVE CHARACTERISTICS ■ ■ Pin, function and fuse-map compatible with all

Pal programming

Abstract: EP610 PALCE610 EP610 ORDERING EP610 "pin compatible"
Contextual Info: COM’L: H-15/25 Advanced Micro Devices PALCE610 Family EE CMOS High Performance Programmable Array Logic DISTINCTIVE CHARACTERISTICS • AMD’s Programmable Array Logic PAL architecture Asynchronous clocking via product term or bank register clocking from external pins

Contextual Info: COM’L: -5/7/B/B-2/A, 10/2 MIL: -10/12/15/B/A Advanced Micro Devices PAL20R8 Family 24-Pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS • As fast as 5 ns maximum propagation delay ■ Power-up reset for initialization ■ Popular 24-pin architectures: 20L8,20R8,

Contextual Info: COM’L: H-15/25 Advanced Micro Devices PALCE24V1 OH-15/25 EE CMOS 28-Pin Universal Programmable Array Logic DISTINCTIVE CHARACTERISTICS • Electrically erasable CMOS technology provides reconfigurable logic and full testability ■ High speed CMOS technology

plji

Contextual Info: COM’L: H-5/7/10/15/25, Q-10/15/25 IND: H-10/15/20/25 PALCE22V10 Family 24-Pin EE CMOS Versatile PAL Device MIL: H-10/15/20/25/30 a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • As fast as 5 ns propagation delay and 142.8 MHz fMAx external Global asynchronous reset and synchronous

210AQ

Abstract: pal22v16 mach210
Contextual Info: bOE » • 0SS7S2L. Ü Ü 3 3 D S D bll I AMDS ADV MICRO P L A / P L E / A R R A Y S COM’L :-10/12/15/20,0-15/20 MIL:-20 MACH210A-10 MACH210-12/15/20 MACH21OAQ-15/20 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS

gg3b

Contextual Info: FINAL COM’L: -15/20 ZI Advanced Micro Devices MACH355-15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 144 Pins in PQFP ■ JTAG, 5-V, in-circult programmable ■ IEEE 1149.1 JTAG testing capability ■ 96 Macrocells ■ 15 ns tpD