PAL22V16 Search Results

Contextual Info: FINAL COM’L :-12/15/20 IND: -18/24 MACH LV210-12/15/20 Lattice/Vantis High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible — V c c = +3.0 V to +3.6 V ■ 83.3 MHz fcNT ■ 38 Bus-Friendly Inputs

Contextual Info: FINAL a COM’L: -12 Advanced Micro Devices M A C H L V 2 1 0 - 1 2 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible — V c c = +3.0 V to +3.6 V ■ 58 MHz fMAxexternal Commercial ■ 38 Inputs with advanced pull-up/pull-down

Contextual Info: COM’L: -15/20 il Advanced Micro Devices M A C H L V 2 1 0 - 1 5 /2 0 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • ■ 50 MHz max external Low-voltage operation, 3.3-V JEDEC compatible ■ 38 Inputs with advanced pull-up/pull-down

Contextual Info: COM’L: -12/15/20 MIL: -20 M A C H 1 1 0 -1 2 /1 5 /2 0 High-Density EE CMOS Programmable Logic Advanced Micro Devices D IS T IN C T IV E C H A R A C T E R IS T IC S • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-Flops; 2 clock choices ■ 12 ns tpD Commercial

Contextual Info: FINAL COM’L: -12/15/20 IND: 14/18/24 a MACH110-12/15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 38 Inputs ■ 32 Macrocells ■ 32 Outputs ■ 12 n s t P D Commercial 14 nstpD Industrial

PAL22V16

Abstract: MACH110 MACH210 MACH215 PAL22V10 MACH210-20JC MACH21S
Contextual Info: COM’L: -7/10/12/15/20, Q-12/15/20 IND: -12/14/18/24 MACH21OA-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ 7.5 ns tpD Commercial

Contextual Info: FINAL COM’L :-12/15/20 IN D :-18/24 a Advanced Micro Devices M A C H L V 2 1 0 - 1 2 / 1 5 /2 0 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible — V c c = +3.0 V to +3.6 V ■ 83.3 MHz fcNT

MACH110 cross reference

Abstract: PAL 002a MACH Technical Briefs Manual PAL 008a ACH110 amd 44 MACH210 class B
Contextual Info: a MACH Family Data Book High Density EE CMOS Programmable Logic Summer 1992 A d van ced Micro Devices M ACH™ 1 and M ACH 2 F a m ilie s High Density EE CMOS Programmable Logic Q3 1992 Data Book Final: Preliminary: M AC H 110-12/15/20 C om ’l, Mil M ASC 110-15/20 C om ’l

PAL22V16

Abstract: MACH110 MACH210 MACH215 MACHLV210 PAL22V10
Contextual Info: FINAL COM’L: -12/15/20 IND: -18/24 MACHLV210-12/15/20 Lattice Semiconductor High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible ■ 83.3 MHz fCNT — VCC = +3.0 V to +3.6 V ■ < 5 mA standby current

Contextual Info: FINAL COM’L: -12/15/20 IND: -14/18/24 Lattice/Vantis M A C H 1 1 0 -1 2 / 1 5 /2 0 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 32 Macrocells ■ 32 Flip-flops; 2 clock choices ■ 12 ns tpD Commercial

Contextual Info: COM’L: -15/20 MIL: -20 M A C H 1 1 0 - 1 5 /2 0 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins 38 Inputs ■ 32 Macrocells 32 Outputs ■ 15 ns tpo Commercial 20 ns fpD Military 32 Flip-Flops ■

Contextual Info: Preliminary COM’ L: -15/20 MIL: -20/25 a Advanced Micro Devices MACH210-15/20 High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins 38 Inputs ■ 64 Macrocells 32 Outputs ■ 15 ns tpD Commercial 20 ns tpD Military 64 Flip-flops

Contextual Info: FINAL COM’L: -12 a MACH210AQ-12 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 32 Outputs ■ 64 Macrocells ■ 64 Flip-flops; 2 clock choices ■ 12 ns tPD Commercial ■ 4 “PAL22V16” blocks with buried macrocells

pal 007a

Abstract: MACH21D PAL 006A PAL 002a pal 005a MACH110 MACH210 MACH215 PAL22V10 PAL22V16
Contextual Info: FINAL COM’L: -7/10/12/15/20, Q-12/15/20 IND: -12/14/18/24 M ACH21OA-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 a Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Peripheral Component Interconnect PCI compliant

Contextual Info: FINAL COM’L: -7/10/12/15/20, Q-12/15/20 MACH21OA-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 IND: -12/14/18/24 Lattice/Vantis High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ 7.5 ns tpD Commercial 12 ns tpD Industrial

Contextual Info: « F IN A L COM ’L: -15/20 MACHLV210-15/20 Advanced Micro Devices High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC com patible ■ 50 MHz fMAx external — Vcc = +3.0 V to +3.6 V ■ 38 Inputs with advanced pull-up/pull-down

Contextual Info: COM’L: -10/12/15/20, Q-15/20 MIL: -20 MACH210A-10 MACH210-12/15/20 MACH210AQ-15/20 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ 38 Inputs; 21OA Inputs have bullt-ln pull-up

Contextual Info: CO M ’L: -12/15/20 MIL: -20 MACH110-12/15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 38 Inputs ■ 32 Macrocells ■ 32 Outputs ■ 12 ns tPD Com m ercial 20 ns t p D M ilitary ■ 32 Flip-flops; 2 clock choices

Contextual Info: F IN A L COM ’L : -15/20 IN D :-18/24 a M A C H Advanced Micro Devices L V 2 1 0 -1 5 /2 0 High Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3-V JEDEC compatible ■ 50 MHz 40 MHz — V Cc = +3.0 V to +3.6 V

Contextual Info: ADV ANCE I NF ORMAT ION COM’L: -15/20 MACHLV210A-15/20 High Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • Low-voltage operation, 3.3 V JEDEC compatible ■ 38 Inputs with pull-up resistors ■ 32 Outputs — Vcc = +3.0 V to +3.6 V

Contextual Info: COM’L: -7.5 Î1 MACH210A-7 Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins 32 Outputs ■ 64 Macrocells 64 Flip-flops; 2 clock choices ■ 7.5 ns 4 “PAL22V16” blocks with buried macrocells ■ tpD

Contextual Info: bOE D • D2S7S2b G033Qüfl 3fl7 ■ AMD2 ADV niCRO PLA/PLE/ARRAYS COM’L: -12/15/20 "T- ll-Q r] MIL: -20 MACH110-12/15/20 High-Density EE CMOS Programmable Logic Advanced Micro Devices DISTINCTIVE CHARACTERISTICS ■ 44 Pins ■ 38 Inputs ■ 32 Macrocells

Contextual Info: FINAL COM’L: -10/12/15/20, Q-15/20 IND: -12/14/18/24 M A C H 2 1 0 A -1 0 M A C H 2 1 0 -1 2 /1 5 /2 0 M A C H 2 1 O A Q -1 5 /2 0 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells

Contextual Info: FINAL COM’L: -7/10/12/15/20, Q-12/15/20 IND: -12/14/18/24 MACH21OA-7/10/12 MACH210-12/15/20 MACH210AQ-12/15/20 a Advanced Micro Devices High-Density EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS • 44 Pins ■ 64 Macrocells ■ 7.5 ns tpD Commercial