0D134 Search Results

SL3045C

Contextual Info: GEC PLESSEY SEMICONDS 43E D • 37böS22 0D134ÖD H M Pl-SB " T m - i S GEC PLESSEY ¡ S E M I C O N D U C T O R S SL3245 3GHz NPN TRANSISTOR ARRAY The SL3245 is a m onolithic array of five high frequency low current NPN transistors. The SL3245 consists of 3 isolated

2SK1665

Abstract: RD20A VM-50V diode sr45 Silicon N Channel MOS FET High Speed Power Switching 2sk16
Contextual Info: 44Tb2D5 0D134ÛE 7^5 « H i m 2SK1665- tlE T> HITACHI/ O P T O E L E C T R O N I C S SILICON N -CHANNEL MOS FET 5 .0 m u . T ii HIGH SPEED POWER SWITCHING • FEATURES • Low On-Resistance • High Speed Switching • Low Drive Current • 4 V Gate Drive Device

GG13

Abstract: GG134
Contextual Info: SSI 32R2103R/2104R ¿iliamjusim' 8/10 Channel Thin Film Read/Write Devices A TDK Group/Company Advance Information December 1995 DESCRIPTION FEATURES The SSI 32R2103R/2104R are BiCMOS monolithic integrated circuits designed for use with two-terminal recording heads. They provide a low noise read

SL3127C

Abstract: plessey SL3127 SL3127
Contextual Info: GEC PLESSEY S EMI CONDS 43E D Bi 37bflS22 0G1347D 1 MPLSB GEC PLESSEY [ S E M I C O N D U C T O rT ] SL3127 HIGH FREQUENCY NPN TRANSISTOR ARRAY The SL3127C is a monolithic array of five high frequency low current NPN transistors in a 16 lead DIL package. The

Contextual Info: âk m . M IC R O 25LC080/160 . C H IP 8K/16K 2.0 CMOS Serial EEPROM PACKAGE TYPES FEATURES PDIP • 3 MHz Clock Rate • Single supply with programming operation down to 2.5V • Low Power CMOS Technology - M ax W rite Current: 5 mA - Read Current: 500 iA

Contextual Info: Panasonic CCD Area Image Sensor MW3736CKH 11 mm 2/3 inch 768H CCD Area Image Sensor • P i n Assignm ents ■ O v e rv ie w Th e M W 3 7 3 6 C K H is a 11m m (2 /3 inch) Interline Transfer C C D (IT -C C D ) solid state im age sensor device. This device uses photodiodes in th e optoelectric conversion

Contextual Info: Panasonic CCD Area Image Sensor MN3723FE 4.5m m 1/4 inch EIS CCD Area Image Sensor • O ve rv iew ■ P in Assignments T h e M N 3 7 2 3 F E is a 4.5m m (1 /4 inch) Interline Transfer C C D (IT -C C D ) solid state im age sensor device. This device uses photodiodes in the optoelectric conversion

Contextual Info: SONY CXA1844Q 10-bit 33MSPS A/D Converter Description T h e C X A 1 8 4 4 Q is a 10-bit 3 3 M S P S 2-step parallel type A /D converter for video signal processing. This A /D converter operates on ± 5 V power supplies. T h e analog signal can be converted to the digital signal

KM418C256/L/SL-7

Contextual Info: SAMSUNG ELECTRONICS INC bME D KM418C256/L/SL • 7 T b 4 m 2 GGlBMTb 12=5 « S U G K CMOS DRAM 256K x 18 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: The S am sung KM418C256/L/SL is a C MOS high speed 262,144 b it x 18 D ynam ic Random A ccess M em ory. Its

Contextual Info: SONY CXA1842S 3-Mode Surround and Vocal Cancellation Description The CXA1842S is a bipolar IC which combines 3mode surround, bass boosting and vocal cancellation function into a single chip. Features •3 -m o d e surround surround A, surround B, simulated stereo

Contextual Info: & 24LCS52 M icrochip 2K 2.5V CMOS Serial EEPROM FEATURES PACKAGETYPE • Single supply with operation down to 2.5V • Low power CMOS technology - 1 mA active current typical - 10 iA standby current typical at 5.5V - 5 |iA standby current typical at 3.0V

Contextual Info: M 93LC76/86 ic r o c h ip 8K/16K 2.5V CMOS Serial EEPROM FEATURES PIN CONFIGURATION • Single supply with programming operation down to 2.5V DIP Package 93LC76/86 • Low power CMOS technology - 1 mA active current typical CS [ • - 5 |iA standby current typical at 3.0V

Contextual Info: mM ITEL MH88632B Central Office Interface Circuit Preliminary Information Features ISSUE 2 • S up po rts Loop S tart and G round S tart protocols • 2-4 W ire conversion • Program m able Input Impedance, Network Balance Impedance and gains Ordering Inform ation

HI302

Abstract: HS302 HI-302
Contextual Info: HARRIS SE MIC OND SECTOR IDE D | 4305271 0013414 1 I HI-302/8Q3 2 HARRIS . T-51-11 Dual DPST CMOS Analog Switch January 1989 Features Description • This Circuit Is Processed In Accordance to Mli-Std883 and Is Fully Conformant Under the Provisions of Paragraph 1.2.1.

78q8392

Contextual Info: SSI 78Q8392L Low Power Ethernet Coaxial Transceiver SaconSvstans' A TDK Group/Company January 1996 DESCRIPTION FEATURES The SSI 78Q8392L Ethernet Transceiver is a low power BiCMOS coax line transmitter/receiver. The device includes analog transmit and receive buffers, a

Contextual Info: MT4LC2M8B1 L 2 MEG X 8 DRAM M IC R O N DRAM 2 MEG x 8 DRAM 3.3V, FAST PAGE MODE, OPTIONAL EXTENDED REFRESH FEATURES PIN ASSIGNMENT (Top View) 28-Pin 300 mil SOJ 28-Pin 400 mil SOJ (DA-3) (DA-4) V cc [ 1 • 28 ) Vss Vccf DQ1 [ 2 27 ] DQ8 DQ1 [ 2 28 ] Vss

Q01327

Abstract: 8051 midi wireless keyboard 8051
Contextual Info: GENERAL DESCRIPTION The FDC37C957FR incorporates an 8051 based keyboard controller; a Flash Interface; four PS/2 ports; real-time clock; SMC's true CMOS 765B FDC w ith advanced digital data separator and 16 byte data FIFO; tw o 16C550A compatible UARTs, the second UART

Contextual Info: n IN T E G R A T E D C IR C U IT S UC5603 UNITRODE PRELIMINARY 9-Line SCSI Active Terminator FEATURES Complies with SCSI and SCSI-2 Standards Provides Active Termination for 9 Lines Power Regulator Output Stage -300mA Sourcing Current for Termination +300mA Sinking Current for Active

MBCG

Abstract: fujitsu mbcg CG21403 SC472 CG21303 cg212 0D134 MBCG2 CG21103 QFP-196
Contextual Info: FUJITSU MICROELECTRONICS 31E D n 3 7 M cJ7bS 001345S i QFfll January 1990 Edition 1.1 FUJITSU PRODUCT PROFILE CG21 Series 0.8-micron CMOS Gate Arrays DESCRIPTION T h e C G 21 se rie s o f 0 .8 n m C M O S g a te arra y s are c u rre n tly a va ila b le in liv e d e v ic e ty p e s w ith fro m 3 0 K to 10 0 K g a te s . T h re e m ore

0a214

Abstract: 048E3 09376h 036D3 030B9H 036B6 08d06 09-D2 0A211 0817AH
Contextual Info: TMS320 DSP Number 84E DESIGNER’S NOTEBOOK Speech data for Spanish LPC Day-Time-Stamping DTS on TMS320Cxx Contributed by Gerardo Murillo Design Problem Where can I get Spanish speech data allowing generation of a vocal output for Date and Time Stamping (DTS) and voice prompts ?

Contextual Info: i \j h ì v . I i/£ ty a u CY7C470 CY7C472 CY7C474 Revision: August 15f 1994 r # C Y PR ESS 8K x 9 FIFO, 16K x 9 FIFO, 32K x 9 FIFO with Programmable Flags Features • 8K x 9 ,16K x 9, and 32K x 9 FIFO • • • • • • • • • • • buffer memory

TSCC 1100

Abstract: SI03
Contextual Info: 5ôE D • b 7 2 4 2 4 D □ 0 1 3 4 7 b =12a « O K I J O K I O K I s e m i c o n d S E M I C O N D U C T O R GR OU P u c t o r - r ^ - ¿ 3 - 1 ? M S M 5 1 4 2 5 2 262,144-Word x 4-Bit MULTIPORT DYNAMIC RAM <Fast Page Mode» <Fast Page Mode> DESCRIPTION

LT 919S

Contextual Info: S G S-THOMSON A Â i SS O ° IV I 07E D | 1 9 6 5 5 D l~ $ -/ (-/ J SLIC ADVANCE DATA L3000, L3010, L3121 A KIT OF SO LID STATE D EV ICES FOR INTEGRATING THE SUBSCRIBER LINE INTERFACE CIRCU IT The S G S S L I C is a set o f solid state devices designed to integrate all the functions, but

Contextual Info: ¿/iiuiu. luööutiy, rwufucuy io, Revision: August 18,1994 ^ CYPRESS CY27H010 128K X 8 High-Speed CMOS EPROM Features Functional Description • CMOS for optimum speed/power • Highspeed — tAA = 25 ns max. commercial — *a a = 35 ns max. (military)