0H31 Search Results

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

chn 840

Abstract: chn 809 ST cny 17 g3 CNY 817 CHN 841 CNY 417 626 T40 NOG CHN 628 CHN 849 845 bios chip
Contextual Info: MIL-M- 38 51 0/ 17 8A 30 April 1984 SUPERSEDING MI L- M- 38 51 0/ 17 8 28 June 1979 MILITARY SPECIFICATION MICROCIRCUITS, DIGITAL, CMOS, M U L T I P L E XE RS /D EMU LT IP LE XE RS MO NO LI TH IC SILICON, POSITIVE LOGIC This specification is approved for use by all D e p a r t ­

7813 Texas Instruments Transistor

Abstract: TMS320C6000 TMS320C6474 C6000 C6474 C64X DDR2-667 SPRS552H BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

transistor d880

Abstract: BR17
Contextual Info: TMS320C6474 www.ti.com SPRS552E – OCTOBER 2008 – REVISED APRIL 2010 TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

transistor D880 circuit diagram application

Abstract: GP-07 BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

MC68EZ328

Abstract: DragonBall FFF004 MC68328 DSA0039263
Contextual Info: ID REGISTER Inside the MC68328 and MC68EZ328, there is a specific read only register that can be used for chip identification purpose. CHIP AND MASK ID REGISTER The special read only register named Chip and Mask ID Register $FFFFF004 is designed to support the identity of different products and different mask sets in the DragonBall family.

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

FFF004

Abstract: MC68328 MC68EZ328 dragonball
Contextual Info: Freescale Semiconductor, Inc. ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 ID REGISTER Inside the MC68328 and MC68EZ328, there is a specific read only register that can be used for chip identification purpose. ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005

2e58

Abstract: BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

Contextual Info: austriamicrosystems AG is now ams AG The technical content of this austriamicrosystems datasheet is still valid. Contact information: Headquarters: ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten, Austria Tel: +43 0 3136 500 0 e-Mail: ams_sales@ams.com

D880 TRANSISTOR

Abstract: A00C equivalent transistor A214 BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

D880 CIRCUIT DIAGRAM

Abstract: SYS13 BR17
Contextual Info: TMS320C6474 www.ti.com SPRS552E – OCTOBER 2008 – REVISED APRIL 2010 TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

D880 voltage regulator

Abstract: SCR 2000 C6000 C6474 C64X DDR2-667 TMS320C6000 TMS320C6474 TRANSISTOR J 5804 EQUIVALENT SPRS552A
Contextual Info: TMS320C6474 Multicore Digital Signal Processor www.ti.com SPRS552A – OCTOBER 2008 – REVISED FEBRUARY 2009 1 Features • • • • • • • • • High-Performance Multicore DSP C6474 – 1-ns Instruction Cycle Time – 1.0-GHz Clock Rate – Eight 32-Bit Instructions/Cycle

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

TRIAC BTA 04 400T

Abstract: TRIAC BTB 04 200T 600T 800T BTA 800 BTA 51 triac
Contextual Info: 3DE D r = Z ^ 7 # • D D B l b Q O T Hi S G S - T H O M S O N LlùTTiMOOS 5 ' T'-'ZS^3> BTA/BTB 04 T S G S-THOMSON SENSITIVE GATE TRIACS ■ GLASS PASSIVATED CHIP ■ Ig t SPECIFIED IN FOUR QUADRANTS ■ AVAILABLE IN INSULATED VERSION BTA SERIES INSULATING VOLTAGE

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

TCI6489

Abstract: Rake search accelerator CDMA system implementation Turbo Decoder wcdma viterbi
Contextual Info: TMS320TCI6489 SPRS626B – NOVEMBER 2009 – REVISED APRIL 2011 www.ti.com TMS320TCI6489 Communications Infrastructure Digital Signal Processor 1 Features • Key Features – High-Performance Communications Infrastructure DSP TCI6489 – 1.18-ns Instruction Cycle Time

SCR 2000

Abstract: C6474 2e58 BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

BR17

Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

D880 voltage regulator

Abstract: BR17
Contextual Info: TMS320C6474 SPRS552H – OCTOBER 2008 – REVISED APRIL 2011 www.ti.com TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

TMS320C6474FGUNA

Abstract: iso 7812 TOD 12K SCR 2000 C6000 C6474 C64X DDR2-667 TMS320C6000 TMS320C6474
Contextual Info: TMS320C6474 www.ti.com SPRS552G – OCTOBER 2008 – REVISED NOVEMBER 2010 TMS320C6474 Multicore Digital Signal Processor 1 Features 12 • Key Features – High-Performance Multicore DSP C6474 – Instruction Cycle Time: 0.83 ns (1.2-GHz Device); 1 ns (1-GHz Device); 1.18 ns

ST1430

Abstract: tds-cdma transceiver C64X DDR2-667 C6000 TMS320C6000 TMS320TCI6489 SPRS626 sgmii specification ieee D880 y
Contextual Info: TMS320TCI6489 www.ti.com SPRS626 – NOVEMBER 2009 TMS320TCI6489 Communications Infrastructure Digital Signal Processor Check for Samples :TMS320TCI6489 1 Features • High-Performance Communications Infrastructure DSP TCI6489 – 1.18-ns Instruction Cycle Time

TMS320C6000

Abstract: TMS320C6474 C6000 C6474 C64X DDR2-667 Transistor D 2494 BR17
Contextual Info: TMS320C6474 www.ti.com SPRS552D – OCTOBER 2008 – REVISED NOVEMBER 2009 TMS320C6474 Multicore Digital Signal Processor Check for Samples :TMS320C6474 1 Features 12 • High-Performance Multicore DSP C6474 – Instruction Cycle Time: • 1.2-GHz Device: 0.83-ns