0X402B Search Results

FS1024

Abstract: R3216 ADAU1361 MX-5G 2S1624 SSM2306 0x402B 55R2 0x401a 0x4019
Contextual Info: 集成PLL的立体声低功耗、 96 kHz、24位音频编解码器 ADAU1361 特性 概述 24位立体声音频ADC和DAC：SNR大于98 dB 采样速率范围：8 kHz至96 kHz 低功耗：7 mW录音，7 mW回放，48 kHz和1.8 V条件下 6个模拟输入引脚，可配置为单端或差分输入

AD1940

Abstract: MO-220-VHHD-2 LR0110
Contextual Info: Low Noise Stereo Codec with Enhanced Recording and Playback Processing ADAU1381 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC 400 mW speaker amplifier into 8 Ω load Built-in sound engine for audio processing Wind noise detection and autofiltering

Amplification* 3646

Abstract: ADAU1361 SSM2306
Contextual Info: Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL ADAU1361 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC: >98 dB SNR Sampling rates from 8 kHz to 96 kHz Low power: 7 mW record, 7 mW playback, 48 kHz at 1.8 V 6 analog input pins, configurable for single-ended or

AD1940

Abstract: MO-220-VHHD-2 D0831
Contextual Info: Low Noise Stereo Codec with Enhanced Recording and Playback Processing ADAU1381 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC 400 mW speaker amplifier into 8 Ω load Built-in sound engine for audio processing Wind noise detection and autofiltering

S1V30345

Abstract: S1V3034x S1V30340 0x80E0
Contextual Info: S1V3034x Series Message Protocol Specification Rev.1.00 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko

Contextual Info: CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33301 Technical Manual NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any

d4498

Abstract: 0x052B CCIR656 S5D2536A TX01 video scaler lcd monitor "DUAL LVDS" lvds display Samsung 0x043e osd font
Contextual Info: S5D2536A Data Sheet Revision 1.0 Table of Contents 1 General 1.1 Overview .5

HT 12D DATASHEET

Abstract: ADAU1361 voice chip recor SSM2306 ALC 665 26625
Contextual Info: Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL ADAU1361 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC: >98 dB SNR Sampling rates from 8 kHz to 96 kHz Low power: 5 mW record, 5 mW playback, 48 kHz at 1.8 V 6 analog input pins, configurable for single-ended or

Contextual Info: Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL ADAU1961 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC: >98 dB SNR Sampling rates from 8 kHz to 96 kHz Low power: 17 mW record, 18 mW playback, 48 kHz 6 analog input pins, configurable for single-ended or

Contextual Info: Low Noise Stereo Codec with SigmaDSP Processing Core ADAU1781 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC 400 mW speaker amplifier into 8 Ω load Programmable SigmaDSP audio processing core Wind noise detection and filtering Enhanced stereo capture (ESC)

ADAU1781

Abstract: MO-220-VHHD-2
Contextual Info: Low Noise Stereo Codec with SigmaDSP Processing Core ADAU1781 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC 400 mW speaker amplifier into 8 Ω load Programmable SigmaDSP audio processing core Wind noise detection and filtering Enhanced stereo capture (ESC)

BT601

Abstract: BT656 ITU656 S5D4100X V601 80-TQFP-1212 ci573
Contextual Info: S5D4100X Data Sheet Revision 0.1 RECORD OF REVISIONS Rev. No Date 0.0 2004/12 0.1 2005/3 Page Description of Change First Release 12 ~ 14 12 Output drive current and Pull Up/Down Pad descriptions Revision Point: PCKO output drive Current change 20mA → 4mA

rca thyristor manual

Abstract: S1C33L01 a12b 014-698
Contextual Info: CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33301 Technical Manual NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any

ADAU1761

Abstract: SSM2306 EVAL-ADAU1761Z op amp 709 417 TRANSISTOR
Contextual Info: SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL ADAU1761 FEATURES GENERAL DESCRIPTION SigmaDSP 28-/56-bit, 50 MIPS digital audio processor Fully programmable with SigmaStudio graphical tool 24-bit stereo audio ADC and DAC: >98 dB SNR

IC No. TC810

Abstract: IC No. TC810 Circuit Diagram A18E CR1A15 TC65 module tc87 8255A ic details CFP70 ic 8255A murata 455KHz ceramic filter
Contextual Info: MF1454-01 CMOS 32-BIT SINGLE CHIP MICROCOMPUTER S1C33T01 Technical Manual S1C33T01 PRODUCT PART S1C33T01 FUNCTION PART NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.

S1V30120

Abstract: AN 5522 circuit diagram of speech to text IS2116 0x8104 0x4053 58310
Contextual Info: S1V30120 Message Protocol Specification Rev.1.17 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko

S1V3S344

Contextual Info: S1V3034x Series Message Protocol Specification S1V3034x S1V3S344 S1V3G340 Rev. 1.23 NOTICE No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.

RGMII constraints

Abstract: TEMAC free source code for cdma transceiver using vhdl 7206 cisco power requirement 7206 cisco GMII VLAN Tag RGMII RGMII phy DS537 LocalLink
Contextual Info: XPS LL TEMAC v2.03a DS537 December 2, 2009 Product Specification Introduction LogiCORE Facts This document provides the design specification for the XPS_LL_TEMAC soft Ethernet core. This core provides a control interface to internal registers via a 32-bit Processor Local Bus (PLB) Version 4.6 as described in the

TAG 8426

Abstract: tag 8606 cisco 2821 RGMII phy RGMII constraints structure of GMII packet with VLAN Tag LocalLink sgmii soft temac constraints for virtex4 tc 3086
Contextual Info: XPS LL TEMAC v2.02a DS537 June 24, 2009 Product Specification Introduction LogiCORE Facts This document provides the design specification for the XPS_LL_TEMAC soft Ethernet core. This core provides a control interface to internal registers via a 32-bit

Amplification* 3646

Abstract: Table-71 ADAU1961 SSM2306 ADAU1961WBCPZ
Contextual Info: Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL ADAU1961 FEATURES GENERAL DESCRIPTION 24-bit stereo audio ADC and DAC: >98 dB SNR Sampling rates from 8 kHz to 96 kHz Low power: 17 mW record, 18 mW playback, 48 kHz 6 analog input pins, configurable for single-ended or

adau1761

Abstract: 0x4031 32-lead LFCSP_VQ 24khz low pass filter
Contextual Info: SigmaDSP Stereo, Low Power, Audio Codec, 96 kHz, 24-Bit, Integrated PLL ADAU1761 Preliminary Technical Data FEATURES GENERAL DESCRIPTION 28-/56-bit 50 MIPS digital audio processor Fully programmable with SigmaStudio graphical tool 24-bit stereo audio ADC and DAC: 100 dB SNR

power distribution projects

Abstract: adau1761 EVAL-ADAU1761Z surround speaker circuit diagram
Contextual Info: SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL ADAU1761 FEATURES GENERAL DESCRIPTION SigmaDSP 28-/56-bit, 50 MIPS digital audio processor Fully programmable with SigmaStudio graphical tool 24-bit stereo audio ADC and DAC: >98 dB SNR

W5200

Contextual Info: iEthernet W5200 iEthernet W5200 Datasheet Version 1.2.8 http://www.wiznet.co.kr Copyright 2012 WIZnet Co., Inc. All rights reserved. 1 iEthernet W5200 W5200 The W5200 chip is a Hardwired TCP/IP embedded Ethernet controller that enables easier internet connection for embedded systems using SPI Serial Peripheral Interface . W5200 suits best for

adau1761

Contextual Info: SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL ADAU1761 FEATURES GENERAL DESCRIPTION SigmaDSP 28-/56-bit 50 MIPS digital audio processor Fully programmable with SigmaStudio graphical tool 24-bit stereo audio ADC and DAC: >98 dB SNR