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    1048C Search Results

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    1048C Price and Stock

    ECS International Inc ECS-320-10-48-CKY-TR

    CRYSTAL 32.0000MHZ 10PF SMD
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    DigiKey ECS-320-10-48-CKY-TR Cut Tape 7,323 1
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    ECS-320-10-48-CKY-TR Digi-Reel 7,323 1
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    ECS-320-10-48-CKY-TR Reel 3,000 3,000
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    Avnet Americas ECS-320-10-48-CKY-TR Reel 24 Weeks 3,000
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    Mouser Electronics ECS-320-10-48-CKY-TR 11,230
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    Newark ECS-320-10-48-CKY-TR Cut Tape 3,000 5
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    Master Electronics ECS-320-10-48-CKY-TR
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    ECS International Inc ECS-480-10-48-CKY-TR

    CRYSTAL 48.0000MHZ 10PF SMD
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    DigiKey ECS-480-10-48-CKY-TR Digi-Reel 7,162 1
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    ECS-480-10-48-CKY-TR Cut Tape 7,162 1
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    ECS-480-10-48-CKY-TR Reel 3,000 3,000
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    Avnet Americas ECS-480-10-48-CKY-TR Reel 24 Weeks 3,000
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    Mouser Electronics ECS-480-10-48-CKY-TR 826
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    Master Electronics ECS-480-10-48-CKY-TR
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    BUD Industries Inc PTQ-11048-C

    BOX PLASTIC 8.6"L X 6.3"W
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    DigiKey PTQ-11048-C Bulk 8 1
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    Mouser Electronics PTQ-11048-C
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    Newark PTQ-11048-C Bulk 4 1
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    RS PTQ-11048-C Bulk 36 8 Weeks 1
    • 1 $34.74
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    Master Electronics PTQ-11048-C 103
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    Sager PTQ-11048-C 3
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    TestEquity LLC PTQ-11048-C 40
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    Bel Power Solutions EPG500-1048-CKF

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    DigiKey EPG500-1048-CKF Box 7 1
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    Mouser Electronics EPG500-1048-CKF 7
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    Sager EPG500-1048-CKF 7 1
    • 1 $392.5
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    Keystone Electronics Corp 1048C

    ACCY BATTERY HOLDER COVER
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    1048C Datasheets (2)

    Part ECAD Model Manufacturer Description Curated Datasheet Type PDF
    1048C Lattice Semiconductor High-Density Programmable Logic Original PDF
    1048C Lattice Semiconductor In-System Programmable High Density PLD Original PDF

    1048C Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    1048C

    Abstract: cpga 476 1048C50LQI 1048C-70
    Text: Specifications ispLSI and pLSI 1048C ® ispLSI and pLSI 1048C High-Density Programmable Logic Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers


    Original
    PDF 1048C Military/883 1048C cpga 476 1048C50LQI 1048C-70

    1048C

    Abstract: No abstract text available
    Text: Specifications ispLSI and pLSI 1048C ispLSI and pLSI 1048C ® High-Density Programmable Logic Functional Block Diagram Output Routing Pool Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 E7 E6 E5 E4 E3 E2 E1 E0 D7 A2 A4 IG N D Q Logic Global Routing Pool GRP


    Original
    PDF 1048C Military/883 1048C

    grp 328

    Abstract: No abstract text available
    Text: ispLSI 1048C/883 In-System Programmable High Density PLD Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers — High-Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original
    PDF 1048C/883 I/O15 I/O12 I/O23 I/O20 I/O17 I/O14 I/O21 I/O18 I/O16 grp 328

    Diode smd f6

    Abstract: 5962-9558701MXC
    Text: ispLSI 1048C/883 In-System Programmable High Density PLD Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers — High-Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original
    PDF 1048C/883 I/O15 I/O12 I/O23 I/O20 I/O17 I/O14 I/O21 I/O18 I/O16 Diode smd f6 5962-9558701MXC

    1048C

    Abstract: No abstract text available
    Text: ispLSI and pLSI 1048C ® High-Density Programmable Logic Functional Block Diagram Output Routing Pool Output Routing Pool F7 F6 F5 F4 F3 F2 F1 F0 E7 E6 E5 E4 E3 E2 E1 E0 D7 A2 A4 IG N D Q Logic Global Routing Pool GRP A5 A6 A7 D B0 B1 B2 B3 B4 B5 B6 B7


    Original
    PDF 1048C Military/883 1048C-70LQ 128-Pin 1048C-50LQ 1048C

    Untitled

    Abstract: No abstract text available
    Text: ispLSI 1048C/883 In-System Programmable High Density PLD Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers — High-Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original
    PDF 1048C/883 I/O21 I/O18 I/O16 I/O13 I/O11 1048C 0212-80B-isp1048C 1048C-50LG/883

    5962-9558701MXC

    Abstract: 1048C
    Text: ispLSI 1048C Device Datasheet September 2010 All Devices Discontinued! Product Change Notifications PCNs have been issued to discontinue all devices in this data sheet. The original datasheet pages have not been modified and do not reflect those changes.


    Original
    PDF 1048C 1048C 1048C-50LQ 1048C-70LQ 1048C-50LQI 1048C-50LG/883 5962-9558701MXC 5A-10 0212-80B-isp1048C 5962-9558701MXC

    1048C

    Abstract: cpga 476
    Text: ispLSI 1048C In-System Programmable High Density PLD Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers — High-Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original
    PDF 1048C Military/883 0212-80B-isp1048C 1048C-70LQ 128-Pin 1048C-50LQ 1048C-50LQI 1048C-50LG/883 1048C cpga 476

    Diode smd f6

    Abstract: 1048C isplsi1048c
    Text: ispLSI 1048C In-System Programmable High Density PLD Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers — High-Speed Global Interconnect — Wide Input Gating for Fast Counters, State


    Original
    PDF 1048C Military/883 0212-80B-isp1048C 1048E spLSI1048C-70LQS 1048C-50LQ 1048C-50LQIS 128-Pin Diode smd f6 1048C isplsi1048c

    GEIA-STD-00021-1

    Abstract: No abstract text available
    Text: TMS570LS20206-EP, TMS570LS20216-EP www.ti.com SPNS209 – JUNE 2012 TMS570LS Series 16/32-BIT RISC Flash Microcontroller Check for Samples: TMS570LS20206-EP, TMS570LS20216-EP 1 TMS570LS Series 16/32-BIT RISC Flash Microcontroller 1.1 Features 1 • The TMS570LS20206-EP and TMS570LS20216EP use the same silicon die as the TMS


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    PDF TMS570LS20206-EP, TMS570LS20216-EP SPNS209 TMS570LS 16/32-BIT GEIA-STD-00021-1

    2032LV

    Abstract: teradyne z1800 tester manual teradyne z8000 tester manual 1016E 1032E 1048C 3256E pDS4102-J44 Quasar gr228x
    Text: ISP Daisy Chain Download Reference Manual Version 5.0 Technical Support Line: 1-800-LATTICE or 408 428-6414 pDS4104 -RM Rev 5.0 Copyright This document may not, in whole or part, be copied, photocopied, reproduced, translated, or reduced to any electronic medium or machine-readable form without


    Original
    PDF 1-800-LATTICE pDS4104 2032LV teradyne z1800 tester manual teradyne z8000 tester manual 1016E 1032E 1048C 3256E pDS4102-J44 Quasar gr228x

    7486 XOR GATE

    Abstract: circuit diagram of half adder using IC 7486 7486 2-input xor gate ic 7486 XOR GATE pin configuration IC 7486 pin configuration of 7486 IC vhdl code for vending machine pin DIAGRAM OF IC 7486 data sheet IC 7408 laf 0001
    Text: Lattice Semiconductor Handbook 1994 Click on one of the following choices: • Table of Contents • How to Use This Handbook • Go to Main Menu 1996 Lattice Semiconductor Corporation. All rights reserved. Lattice Semiconductor Handbook 1994 i Copyright © 1994 Lattice Semiconductor Corporation.


    Original
    PDF

    PLSI 1016-60LJ

    Abstract: PAL 007 pioneer pal16r8 programming algorithm PAL 008 pioneer lattice 1016-60LJ ISP Engineering Kit - Model 100 PLSI-2064-80LJ GAL16v8 programmer schematic GAL programming Guide ispLSI 2064-80LT
    Text: Lattice Semiconductor Data Book 1996 Click on one of the following choices: • Table of Contents • Data Book Updates & New Products • Go to Main Menu 1996 Lattice Semiconductor Corporation. All rights reserved. ispLSI and pLSI Product Index Pins Density


    Original
    PDF 1016E 1032E 20ters 48-Pin 304-Pin PLSI 1016-60LJ PAL 007 pioneer pal16r8 programming algorithm PAL 008 pioneer lattice 1016-60LJ ISP Engineering Kit - Model 100 PLSI-2064-80LJ GAL16v8 programmer schematic GAL programming Guide ispLSI 2064-80LT

    Untitled

    Abstract: No abstract text available
    Text: TMS570LS20216, TMS570LS20206, TMS570LS10216 TMS570LS10206, TMS570LS10116, TMS570LS10106 SPNS141F – AUGUST 2010 – REVISED JULY 2011 www.ti.com TMS570LS Series 16/32-BIT RISC Flash Microcontroller Check for Samples: TMS570LS20216, TMS570LS20206, TMS570LS10216, TMS570LS10206, TMS570LS10116, TMS570LS10106


    Original
    PDF TMS570LS20216, TMS570LS20206, TMS570LS10216 TMS570LS10206, TMS570LS10116, TMS570LS10106 SPNS141F TMS570LS 16/32-BIT

    Untitled

    Abstract: No abstract text available
    Text: Lattice' | Semiconductor I Corporation ispLSI9 and pLSt 1048C High-Density Programmable Logic Features Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers


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    PDF 1048C ispLS110 128-P 128-Pin 133-Pin 041A-48C

    Untitled

    Abstract: No abstract text available
    Text: Lattice' ispLSr and pLSr 1048C | Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers


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    PDF 1048C 1048C-70LQ 128-Pin ispLS11048C-50LQ I1048C -70LQ I1048C-50LQ

    70lq

    Abstract: isplsi architecture
    Text: LATTSOOl Lattice ispLSr and pLSI* 1048C High-Density Programmable Logic Features Functional Block Diagram 3323 raisi rmm rrm gg iiiit'n rmm ri tm mm HIGH-DENSITY PROGRAMMABLE LOGIC — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers


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    PDF 1048C 128-Pln 1048C- 1048C 1048C-70LQ 1048C-50LQ I1048C -70LQ I1048C-50LQ 128-Pin 70lq isplsi architecture

    Untitled

    Abstract: No abstract text available
    Text: Lattica ispLSI and pLS/0 1048C ;Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers


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    PDF 1048C 041A-48C-isp

    ncl 055

    Abstract: No abstract text available
    Text: Lattica ispLSI' and pLSI' 1048C ;Semiconductor ICorporation High-Density Programmable Logic Features Functional Block Diagram • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output Enables — 288 Registers


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    PDF 1048C ncl 055

    ISPLSI3320-70LQ N

    Abstract: No abstract text available
    Text: Specifications ispLSI and pLSI 1048C Lattice ispLSI and pLSI 1048C ;Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output


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    PDF 1048C Military/883 ispLS11048C-70LQ 128-Pin ispLS11048C-50LQ I1048C-70LQ I1048C-50LQ ISPLSI3320-70LQ N

    Untitled

    Abstract: No abstract text available
    Text: Lattice ispLSI and pLSI‘ 1048C ; Semiconductor I Corporation High-Density Programmable Logic Features Functional Block Diagram ' HIGH-DENSITY PROGRAMMABLE LOGIC Tm Elm s a i rmn n tin i rrm rn i’i rrm • O u tpu t R outing Pool — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output


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    PDF 1048C 1048C-70LQ 128-Pin 1048C-50LQ 1048C -70LQ

    Untitled

    Abstract: No abstract text available
    Text: •■■ mmm mmm Lattica Semiconductor ■■■■■■ Corporation ispLSI and pLSI’ 1048C High-Density Programmable Logic F u n c tio n a l B lo c k D ia g ra m • HIGH-DENSITY PROGRAMMABLE LOGIC — 8000 PLD Gates — 96 I/O Pins, 12 Dedicated Inputs, 2 Global Output


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    PDF 1048C Military/883 ispLS11048( PL8W848C-TOtO 128-P 133-P

    1048N6c

    Abstract: 1048B6C TDC1048 41612B trw tdc1048n6c TDC4611 1048R RNE-64BS-S-TG 1N3062 TDC1048E1C
    Text: TDC1048 Monolithic Video A/D Converter 8-Bit, 20Msps The TRW TDC1048 is a 20Msps MegaSample Per Second full-parallel (flash) analog-to-digital converter, capable of converting an analog signal with full-power frequency components up to 7MHz into 8-bit digital


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    PDF TDC1048 20Msps TDC1048 TDC1048E1C 1048N6c 1048B6C 41612B trw tdc1048n6c TDC4611 1048R RNE-64BS-S-TG 1N3062 TDC1048E1C

    CMGA6-P133

    Abstract: qml-38535 1048C
    Text: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED T REV SHEET REV SHEET 15 16 REV STATUS OF SHEETS PMIC N/A STAND ARD M ICRO CIRC UIT DRAW ING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE REV SHEET 10 PREPARED BY


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    PDF JUL94 O0470fi 10D47DÃ 0D21022 CMGA6-P133 qml-38535 1048C