10X10X1.4 TQFP 44 Search Results

SOP48

Abstract: CF RM sot89 SOP38 14X14X2 epson QFP 216 14X14X1 45x45 mm bga 14X20X2 14x14x2.7 QFP13
Contextual Info: Plastic QFP Pin Count 44 46 48 52 60 64 80 100 120 128 144 160 176 184 208 216 232 240 256 304 Package code QFP 13 QFP4 QFP2 QFP6 QFP5 QFP12 QFP5 QFP6 QFP2 QFP6 QFP5 QFP13 QFP15 QFP6 QFP5 Plastic TQFP Body size mm 10X10X1.4 10X10X1.45 14X14X2 14X14X2.7 14X20X2.7

A48A

Abstract: A101 120-PIN 7x7x1.4 160-PIN plastic quad flat pack 10X10X1.4 tqfp 44
Contextual Info: Package Diagrams Thin Quad Flat Packs 32-Lead Thin Plastic Quad Flatpack 7 x 7 x 1.0mm A32 51-85063-B 32-Lead Thin Plastic Quad Flatpack 7 x 7 x 1.4 mm A32.14 51-85088-*B 1 Package Diagrams 44-Lead Thin Plastic Quad Flat Pack A44 51-85064-B 44-Lead Thin Plastic Quad Flat Pack 10 x 10 x 1.0 mm A44SB

qsop 16 pcb footprint

Abstract: 16 QSOP pcb footprint 4036N qsop 24 footprint 16 soic pcb footprint SOIC-24 SSOP20 300 mil Footprint QS6611 SSOP20 SSOP48
Contextual Info: QQS Selection Guide and Packaging Information UALITY EMICONDUCTOR, INC. Thermal Characteristics Thermal Characteristics of QSI Packages Package H HQSOP, 150-mil HB LF 10x10x1.4 J PLCC square JR PLCC rectangular P PDIP, 300-mil PA TSSOP 170-mil 240-mil 240-mil

Contextual Info: 49 CY29949 2.5V or 3.3V, 200-MHz, 1:15 Clock Distribution Buffer Features • • • • • • • • • • • Description 2.5V or 3.3V operation 200-MHz clock support LVPECL or LVCMOS/LVTTL clock input LVCMOS-/LVTTL-compatible outputs 15 clock outputs: drive up to 30 clock lines

Contextual Info: FastEdge Series CY2PP3115 1:15 Differential Clock/Data Fanout Buffer Features Functional Description The CY2PP3115 is a low-skew, low propagation delay 1-to-15 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The

IMIZ9974CA

Abstract: MPC974 Z9974
Contextual Info: Z9974 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features • • • • • • • • • • The Z9974 integrates PLL technology for zero delay propagation from input to output. The PLL feedback is externally available for propagation delay tuning and divide ratio alternatives

Contextual Info: FastEdge Series CY2PP3115 1:15 Differential Clock/Data Fanout Buffer Features Functional Description The CY2PP3115 is a low-skew, low propagation delay 1-to-15 differential fanout buffer targeted to meet the requirements of high-performance clock and data distribution applications. The

Contextual Info: Z9974 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features • • • • • • • • • • The Z9974 integrates PLL technology for zero delay propagation from input to output. The PLL feedback is externally available for propagation delay tuning and divide ratio alternatives

IMIZ9974CA

Abstract: MPC974 Z9974
Contextual Info: Z9974 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features • • • • • • • • • • The Z9974 integrates PLL technology for zero delay propagation from input to output. The PLL feedback is externally available for propagation delay tuning and divide ratio alternatives

SELC0

Contextual Info: CY29972 3.3V, 125-MHz Multi-Output Zero Delay Buffer Features Table 1. Frequency Table[1] VC0_SEL FB_SEL2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 • Output frequency up to 125 MHz • 12 Clock outputs: frequency configurable • 350 ps max. output-to-output skew

144 QFP body size

Abstract: 35x35 bga BGA and QFP Package vhdl code for usart DesignWare SPI 0.18-um CMOS technology characteristics ARM7 verilog code NEC-V850 PZT driver design vhdl coding for analog to digital converter
Contextual Info: GS20 0.18-µm CMOS Standard Cell/Gate Array Version 1.0 April 6, 1999 Copyright  Texas Instruments Incorporated, 1999 The information and/or drawings set forth in this document and all rights in and to inventions disclosed herein and patents which might be granted thereon disclosing or employing the

synopsys Platform Architect

Abstract: clock tree balancing DesignWare SPI vhdl code for watchdog timer of ATM 0.18-um CMOS technology characteristics vhdl coding for analog to digital converter CML Vterm 27x27
Contextual Info: GS20 0.18-µm CMOS Standard Cell/Gate Array Version 1.1 May 19, 2000 Copyright  Texas Instruments Incorporated, 2000 The information and/or drawings set forth in this document and all rights in and to inventions disclosed herein and patents which might be granted thereon disclosing or employing the

blw 64 transistor

Abstract: transistor BLW 33 substitute EN61000-4-2 LAN8187 LAN8187-JT
Contextual Info: LAN8187/LAN8187i ±15kV ESD Protected MII/RMII 10/100 Ethernet Transceiver with HP Auto-MDIX & flexPWR Technology PRODUCT FEATURES „ „ „ „ Data Brief Single-Chip Ethernet Physical Layer Transceiver PHY ESD Protection levels of ±8kV HBM without external

SC973

Abstract: CY29976 CY29976AI SC973X
Contextual Info: 76 CY29976 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features • • • • • • • • • • • • Table 1. Frequency Table[1] Output frequency up to 125 MHz Supports PowerPC , and Pentium® processors 12 clock outputs: frequency configurable

CY29976

Abstract: CY29976AI SC973X
Contextual Info: 76 CY29976 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features • • • • • • • • • • • • Table 1. Frequency Table[1] Output frequency up to 125 MHz Supports PowerPC , and Pentium® processors 12 clock outputs: frequency configurable

AD7015

Abstract: circuit diagram GSM transmitter receiver BT1075 BT107 BethelTronix crystal filter 7,8mhz
Contextual Info: TRFICTM FAMILY BTI BT1075 61 62 64 63 66 65 67 68 69 70 72 71 73 74 75 76 77 58 4 57 5 56 55 6 7 8 12 13 50 49 48 BT1075 14 15 16 47 46 45 17 18 44 43 19 41 40 37 38 39 36 35 34 33 32 31 30 29 28 27 42 26 20 52 51 BTI 11 gndsc gndsc rxout_in rxout_ip rxout_qn

USB20H04

Abstract: USB20H04-JD USB20H04-JT dpx 405 dmx
Contextual Info: USB20H04 4-Port USB 2.0 Hub Controller Datasheet Product Features General Features ƒ Compliant with USB 2.0 Specification OEM Selectable Features ƒ Configure as a bus-powered or self-powered Hi-Speed USB hub Four transaction translators ensure maximum USB

CY29976

Abstract: CY29976AI SC973X
Contextual Info: 76 CY29976 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features • • • • • • • • • • • • Table 1. Frequency Table[1] Output frequency up to 125 MHz Supports PowerPC , and Pentium® processors 12 clock outputs: frequency configurable

ethernet transformer center tap

Abstract: 1893AF tg22s012nd ICS1890 ICS1893 ICS1893AF ICS1893Y-10 "network interface cards"
Contextual Info: Integrated Circuit Systems, Inc. ICS1893AF Product Brief 3.3V 10Base-T/100Base-TX Integrated PHYceiver General • DSP-based baseline wander correction to virtually eliminate killer packets across temperature range of -5º to +85º C. The ICS1893AF is a lower cost, re-packaged version of

4 port usb2.0 hub

Abstract: 24C02A USB20H04 USB20H04-JD USB20H04-JT 4-Port USB2.0 Hub
Contextual Info: USB20H04 4-Port USB2.0 Hub Controller Datasheet Product Features General Features ƒ Compliant with USB2.0 Specification OEM Selectable Features ƒ Configure as a bus-powered or self-powered Hi-Speed USB hub Four transaction translators ensure maximum USB

CY29977

Abstract: CY29977AI
Contextual Info: 77 CY29977 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features • • • • • • • • • • • Table 1. Frequency Table[1] Output frequency up to 125 MHz Supports PowerPC and Pentium® processors 12 clock outputs: frequency configurable Configurable Output Disable

CY29976

Abstract: CY29976AXI CY29976AXIT SC973X
Contextual Info: CY29976 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features • Output frequency up to 125 MHz ® ■ Spread spectrum compatible ■ Supports PowerPC , and Pentium processors ■ Glitch-free output clocks transitioning ■ 12 clock outputs: frequency configurable

CY29977

Abstract: CY29977AI
Contextual Info: 77 CY29977 3.3V, 125-MHz, Multi-Output Zero Delay Buffer Features • • • • • • • • • • • Table 1. Frequency Table[1] Output frequency up to 125 MHz Supports PowerPC and Pentium® processors 12 clock outputs: frequency configurable Configurable Output Disable

CY29976

Abstract: CY29976AXI CY29976AXIT SC973X
Contextual Info: CY29976 3.3 V, 125-MHz, Multi-Output Zero Delay Buffer Features • Output frequency up to 125 MHz ® ■ Spread spectrum compatible ■ Supports PowerPC , and Pentium processors ■ Glitch-free output clocks transitioning ■ 12 clock outputs: frequency configurable