112 PIN CACHE Search Results

9248 System Clock Chip

Contextual Info: ICS9248-112 Integrated Circuit Systems, Inc. Preliminary Product Preview Frequency Generator & Integrated Buffers for Celeron & PII/III Pin Configuration Recommended Application: 810/810E type chipset. Output Features: • 2- CPUs @2.5V, up to 150MHz. •

Contextual Info: ICS9248-112 Integrated Circuit Systems, Inc. Frequency Generator & Integrated Buffers for Celeron & PII/III Pin Configuration Recommended Application: 810/810E type chipset. Output Features: • 2- CPUs @2.5V, up to 166.5MHz. • 9 - SDRAM @ 3.3V, up to150MHz including

capacitor 106 16K

Abstract: burndy 10 pin 106 16k TAG 86 TDQ3 tdq4 256K-byte SRAM 486 system bus TAG 106 D MCM32N864
Contextual Info: MOTOROLA Order this document by MCM32N864/D SEMICONDUCTOR TECHNICAL DATA Advance Information 256KB Secondary Cache Module With Tag and Optional Dirty for 486 Processor Systems These 256K Byte cache modules offer dual asynchronous 32K x 32 banks of memory. There is a 16K x 8 tag memory for main memory cacheability up to 64

burndy 8 pin CONNECTOR

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information 256KB Secondary Cache Module With Tag and Optional Dirty for 486 Processor Systems These 256K Byte cache modules offer dual asynchronous 32K x 32 banks of memory. There is a 16K x 8 tag memory for main memory ca cheability up to 64

tdq4

Contextual Info: MOTOROLA • SEMICONDUCTOR TECHNICAL DATA Advance Information 128KB/256KB/512KB Secondary Cache Module MCM32AB32 MCM32AB64 MCM32AB128 With Tag, Valid, and Dirty for 486 Processor Based Systems The MCM32AB32SG, MCM32AB64SG, and MCM32AB128 are a family of Motorola’s asynchronous secondary cache modules for the 486 processor. This family

TAG 106 D

Abstract: tdq 4 Intel 82420 tdq-3
Contextual Info: bSE D • b3b72Sl MOTOROLA ODflññflT t,□ 4 ■ MOTOROLA SC riOT3 {MEflORY/ASI ■ SEMICONDUCTOR TECHNICAL DATA Advance Information 128KB/256KB/512KB Secondary Cache Module MCM32AB32 MCM32AB64 MCM32AB128 With Tag, Valid, and Dirty for 486 Processor Based Systems

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information 256KB Secondary Cache Module With Tag and Optional Dirty for 486 Processor Systems MCM32N864 MCM32N865 MCM32P864 MCM32P865 These 256K Byte cache modules offer dual asynchronous 32K x 32 banks of memory. There is a 16K x 8 tag memory for main memory cacheability up to 64

Intel 82420

Abstract: Nippon capacitors 82420 MCM32A732 MCM32A764 MCM32A832 MCM32A864 MCM32A932 MCM32A964
Contextual Info: MOTOROLA Order this document by MCM32A732/D SEMICONDUCTOR TECHNICAL DATA Advance Information 128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems This family of cache modules is well suited to provide the secondary cache for

Intel 82420

Abstract: tag 87 MCM32A732 MCM32A764 MCM32A832 MCM32A864 MCM32A932 MCM32A964 Nippon capacitors
Contextual Info: MOTOROLA Order this document by MCM32A732/D SEMICONDUCTOR TECHNICAL DATA Advance Information 128KB/256KB Secondary Cache Module With Tag, Valid, and Dirty for i486 Processor Systems This family of cache modules is well suited to provide the secondary cache for

TB 2929 H

Abstract: i486sx 82424TX LT3112 i486sx intel idt 256kb cache intel 486 dx 33mhz P6135
Contextual Info: INTEGRATED DE VI CE baE • 4 3 5 5 77 1 D O m S b n 128KB/256KB/512KB SECONDARY CACHE MODULES FOR THE INTEL* i486 CPU/82420TX PCI SET Sib ■ PRELIMINARY IDT7MP6133 Id™ ! « ¡SESSIS IDT7MP6153 FEATURES DESCRIPTION • 128KB/256KB/512KB secondary cache m odule family

intel I486 processor

Abstract: intel i486DX2 82420TX i486DX2 66 82424TX i486SX intel i486 D1669 82420 i486sx intel
Contextual Info: INTEGRATED DEVICE bflE D 4 0 55771 DGmSt.0 51b 128KB/256KB/512KB SECONDARY CACHE MODULES FOR THE INTEL8 i486 CPU/82420TX PCI SET IDT PRELIM INARY IDT7M P6133 IDT7M P6134 IDT7M P6135 IDT7MP6151 IDT7MP6152 IDT7M P6153 FEATURES DESCRIPTION • 128K B /256K B /512K B secondary cache m odule family

SCM586P256

Abstract: 82430FX tk 7107 Triton P54C
Contextual Info: SONY SCM586P256I SCM586P512I PRELIM INARY Cache SIMM for Intel 82430FX P54C Chip Set 256KB/512KB Pentium Cache SIMMs Description Pin Configuration top view The SCM586P256I and SCM586P512I are a family of self-contained secondary cache modules designed specifically for use with Intel’s Pentium microproces­

DH21

Abstract: TAG 136 A TAG 106 D MOTOROLA PC2004
Contextual Info: M O TO RO LA SEMICONDUCTOR TECHNICAL DATA Advance Information 256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC™ PReP/CHRP Platforms MPC2004 MPC2005 The M PC 2004 and M P C 2005 are designed to provide burstable, high perfor­ mance 256KB/512KB L2 cache for the PowerPC 60x microprocessor family in

Contextual Info: Paradigm P D M 4 M 6 1 8 9 256 KByte Second Level Cache Modules for Intel Pentium CPUs Features Description 256 KByte asynchronous second level cache. L. Pin compatible with the PDM4M6181 /6182. J Ideal for use with Intel Pentium™ CPU based systems. Especially those using Intel's 82430NX

TB 2929 H

Abstract: tb 2929 P6164 P-6134 UM 7106 82424TX P6135 P6133 P-6135 420TX
Contextual Info: 128KB/256KB/512KB SECONDARY CACHE MODULES FOR THE INTEL6 i486 CPU/82420TX PCI SET PR ELIM IN ARY IDT7M P6133 IDT7M P6134 IDT7M P6135 IDT7MP6151 IDT7M P6152 IDT7MP6153 FEATURES DESCRIPTION • 1 2 8K B /2 56K B /512 K B s e c o n d a ry ca ch e m o dule fam ily

dh23

Abstract: DH0 165 dh15 F04 MOTOROLA MPC2006 dh14 TAG 93 motorola f04 Nippon capacitors burndy baa
Contextual Info: MOTOROLA Order this document by MPC2004/D SEMICONDUCTOR TECHNICAL DATA Advance Information 256KB and 512KB BurstRAM Secondary Cache Modules for PowerPC PReP/CHRP Platforms MPC2004 MPC2005 The MPC2004 and MPC2005 are designed to provide burstable, high performance 256KB/512KB L2 cache for the PowerPC 60x microprocessor family in

BY575

Abstract: 28BZ 8 PINS J-354W display 16119
Contextual Info: 501-4126 3D 501-4127 (2D) July 1997 FFB DATA SHEET High Performance UPA Based 24-bit Frame Buffer DESCRIPTION The Fast Frame Buffer (FFB) is a high performance UPA based 24-bit frame buffer with an integer rendering pipeline for use in demanding graphic applications. It is a UPA slave-only, non-cached, PIO graphics output

I-CUBE

Abstract: 32Kx16 AD10 AD11 AD12 LS100
Contextual Info: LS105 SATC Controller Features Description • 33 MHz 32-bit PCI bus interface, 8 interrupt lines to support up to 8 LS100s. • 32/48 bit Interface with standard asynchronous SRAM to cache up to 64K MAC addresses. • Supports Port based VLAN with internal port

322k

Abstract: DSP16210 DSP16000
Contextual Info: Advisory April 2002 DSP16000 Core In the DSP16000 core, the contents of the internal do loop cache are also accessible as memory at location 0x1ffc0 in most DSP16000 devices in order to facilitate saving and restoring of the cache contents on a subroutine call or context switch.

Contextual Info: UNITE» MICROELECTRONICS UM82C388 3QE D • ^355655 DOD01 fab 1 5^-33 ^ \ INTEL Cache Interface Features ■ Supports 16 MHz, 20 MHz and 25 MHz Intel 80386 Supports 2 5 6 K and 1M DRAM S ■ Supports 25 MHz 80386 with 82385 cache controller 1.2/it CMOS technology

PBSRAM

Abstract: mosys GW 66 475 ci 94086 MC80364K64 64KX64
Contextual Info: MC80364K64 Low Power 3.3V/2.5V MOSYS 64Kx64 PBSRAM • High performance, low power pipeline burst SRAM Ultra low power single chip 512Kbyte Cache for green PC and battery powered PC VSSQ - 39 N/C - 40 MODE - 41 A15 - 42 A14 - 43 A13 - 44 VDD - 45 VSS - 46

Contextual Info: U N IT E D M IC R O E L E C T R O N IC S BDE T 3 2 S f lS E D D D O D lt ? 3 U M 8 2 C 3 8 9 AUSTEK Cache interface Features • Supports a flexible system memory configuration: a. 1M ,2M or 3M using 256K x 1 DRAM b. 4M, 8M or 12M using 1M x 1 DRAM ■ Uses normal page DRAM Static column is unnecessary

Contextual Info: M O TO R O LA SEMICONDUCTOR TECHNICAL DATA MCM64AC32 Advance Information 256KB Asynchronous Secondary Cache Module for PowerPC The MCM64AC32 is designed to provide asynchronous 256KB L2 cache for the PowerPC 60x processors. The module is configured as 32K x 64 bits in a 136

Contextual Info: _ TM tH H ifla a G MICRO & SV*"’ » *„.A«*”" O D is m i T m M ITSUB ISH I l s u M33245GS n iT S U B is H iin ic n P T R /n iP R o ste d CMOS CACHE CONTROLLER/M EM ORY M 32/C C M v T S l'iß - Z L ~ DESCRIPTION M33245GS (M 32/C C M ) is a cache controller/mem ory for