133FI Search Results

PALCE22v10 amd

Contextual Info: a PALCE22V1 OH-15/25/Q-25 Advanced Micro Devices 24-pin EE CMOS Versatile PAL Device DISTINCTIVE CHARACTERISTICS • As fast as 15 ns propagation delay and 50 MHz fMAx ■ Global asynchronous reset and synchronous preset for initialization ■ Low-power EE CMOS

33F2

Abstract: l62a marking 133I 1N3064
Contextual Info: MIL-M-38510/162A fiÆaiwæ- IQ U A L I F I C A T I M I REQUIREMENTS I I R E M OV E D I MIL-M-38510/162(USAF 2 A u gu st 1976 MILITARY SPECIFICATION M I C R O C I R C U I T S , D I G I T A L , T T L , N OR B U F F E R S , M ON OL IT HIC SILICON j INACT I VE F OR NEW D E S I G N A F T E R DA T E OF T H I S R E V I S I O N j

Contextual Info: June 1992 DM74S240, DM74S241, DM74S244 Octal TRI-STATE Buffer/Line Driver/Line Receiver General Description Typical Io l sink current 74S 64 mA Typical Ioh (source current) 74S - 1 5 mA Typical propagation delay times Inverting 4.5 ns Noninverting 6 ns

F74B

Contextual Info: SPEED/PACKAGE AVAILABILITY 54 f ;w 54H F,W 54LS F,W 54S F,W 74 74H 74LS 74S PIN CONFIGURATION A,F A,F A,F A,F 74.74H, 54/74LS, 54/748 A,F,W PACKAGE SWITCHING CHARACTERISTICS TEST CONDITIONS PARAMETER 54,54« W PACKAGE v C C - 5V, TA = 25°C 54/74 54/74H 54/74LS

Contextual Info: Semiconductor August 1989 54LS244/DM74LS244 Octal TRI-STATE Buffers/Line Drivers/Line Receivers General Description These buffers/line drivers are designed to improve both the performance and PC board density of TRI-STATE buffers/ drivers employed as memory-address drivers, clock drivers,

A13B

Abstract: DQ17A-DQ0A A14B DQ4a DQ11A
Contextual Info: July 2004 Preliminary Information AS9C25512M2018L 2.5V 512K X 18 Synchronous Dual-port SRAM with 3.3V or 2.5V interface Features • True Dual-Port memory cells that allow simultaneous access of the same memory location • Organisation: 524,288 x 18 bits

DQ20A

Abstract: A17a DQ18A be2a A13B
Contextual Info: July 2004 Preliminary Information AS9C25256M2036L 2.5V 256K X 36 Synchronous Dual-port SRAM with 3.3V or 2.5V interface Features • True Dual-Port memory cells that allow simultaneous access of the same memory location • Organisation: 262,144 x 36 bits

SN7441

Abstract: 54175 TFK 404 MM1402a equivalent SD300 N74141 SN7401 3 BB 4 SO 5 CON 6 RAY 7 CC 8 SI 9 RB 10 RG 11 VE
Contextual Info: NUMERICAL INDEX FUNCTIONAL INDEX SALES OFFICES Copyright 1974 S IG N E T IC S C O R P O R A T IO N Signetics Corporation reserves the right to make changes in the products contained in this book in order to improve design or performance and to supply the best possible product.

ITT Cannon cct

Abstract: 4h27 CHP-420
Contextual Info: o SUBMINIATURE RECTANGULAR CONNECTORS ITT CANNON CONNECTOR SELECTION GUIDE Continued CONNECTORS FOR PRINTED CIRCUIT BOARDS SHIELDED RIGHT ANGLE EDBL25SBA1 ED* Series Page 17 PIN AND SOCKET RIGHT ANGLE DDP-50SAA 0* P Series Page 20 VERTICAL MOUNT DBPF25 (P or S) Y4