13MAY05 Search Results

EIA-364-20

Abstract: EIA36420 EIA-364-29 EIA-364-55 test method 4 EIA-364-8 AMP Faston flag connector EIA-364-23 terminal
Contextual Info: 108-2215 Product Specification 13May05 Rev A FASTON* .187 Ultra-Pod Flag Receptacle Assembly 1. SCOPE 1.1. Content This specification covers performance, tests and quality requirements for the FASTON* .187 Ultra-Pod Flag Receptacle Assembly. 1.2. Qualification

S9013LT1

Contextual Info: S9013LT1 3 P b Lead Pb -Free 1 2 SOT-23 V CEO Value 25 40 5.0 500 S9013LT1=J3 25 0.1 40 100 100 E=20 Vdc, I E= 0 O ) 40 5.0 WEITRON http://www.weitron.com.tw 1/3 0.1 u 0.1 u 0.1 u Rev.A 13-May-05 S9013LT1 ELECTRICAL CHARACTERISTICS (TA=25 C unless otherwise noted) (Countinued)

U1001

Abstract: 84-1LMI XP1005 XU1001 circuit diagram of 4 channel 315 rf transmitter
Contextual Info: 33.0-40.0 GHz GaAs MMIC Transmitter U1001 May 2005 - Rev 13-May-05 Features Chip Device Layout Sub-Harmonic Transmitter Low DC Power Consumption Optional Power Bias 8.0 dB Conversion Gain 30 dB LO/RF Isolation 100% On-Wafer RF and DC Testing 100% Visual Inspection to MIL-STD-883 Method 2010

n-channel mosfet SOT-23 3a

Abstract: WTC2306 g2ns
Contextual Info: WTC2306 N-Channel Enhancement Mode Power MOSFET DRAIN CURRENT 5.3 AMPERS 3 DRAIN P b Lead Pb -Free DRAIN SOUCE VOLTAGE 20 VOLTAGE 1 GATE 2 Features: SOURCE 3 *Super High Dense Cell Design For Low R DS(ON) R DS(ON) <90mΩ@V GS =12V *Rugged and Reliable *Capable of 2.5V Gate Drive

U1000

Abstract: XB1004 XU1000
Contextual Info: 17.0-27.0 GHz GaAs MMIC Transmitter U1000 May 2005 - Rev 13-May-05 Features Chip Device Layout Fundamental Transmitter Low DC Power Consumption Optional Power Bias Configuration 0.0 dB Conversion Gain +12.0 dBm Third Order Intercept IIP3 100% On-Wafer RF and DC Testing

Contextual Info: TFDU2201 Vishay Semiconductors Low Profile Transceiver Module PIN Photodiode and Infrared Emitter Description The miniaturized TFDU2201 is an ideal PIN photodiode transmitter combination in a unique package for applications in telecommunications like mobile

BLH load cell

Abstract: weighing scale
Contextual Info: Model U3SB-A Vishay BLH Nickel Plated Steel S-Type Load Cells FEATURES • Capacitiy range: 50 to 20K lb 22.7 to 9K kg • Designed for single or multiple load cell applications • Nickel-plated, alloy steel construction • Integral 20-foot cable for maximum mounting flexibility

CDR33BX

Abstract: CDR34BP CDR31BX CDR03BX
Contextual Info: CDR-MIL-PRF-55681 Vishay Vitramon Multilayer Ceramic Chip Capacitors, Qualified, Type CDR FEATURES • Military qualified products. • High reliability tested per MIL-PRF-55681. • Lead Pb -free applied for “Y” and “M” termination code. GENERAL SPECIFICATIONS

Contextual Info: 18.0-34.0 GHz GaAs MMIC Receiver R1002 May 2005 - Rev 13-May-05 Features Chip Device Layout Fundamental High Dynamic Range Receiver Integrated Gain Control +4.0 dBm Input Third Order Intercept IIP3 14.0 dB Conversion Gain 3.0 dB Noise Figure 25.0 dB Image Rejection

WSD1045CT

Contextual Info: WSD1030CT thur WSD1045CT D-PAK * “G” Lead Pb -Free REVERSE VOLTAGE 30 TO 45 VOLTS FORWARD CURRENT 10 AMPERE *For Surface Mount Application *Metal-Semiconductor Junction With Guardring *Epitaxial Construction *Low Forward Voltage Drop *High Current Capability

Contextual Info: S9013LT1 3 * “G” Lead Pb -Free 1 2 SOT-23 V CEO Value 25 40 5.0 500 S9013LT1=J3 25 0.1 40 100 100 O E=20 Vdc, I E= 0 ) 40 5.0 WEITRON http://www.weitron.com.tw 1/3 0.1 u 0.1 u 0.1 u Rev.A 13-May-05 S9013LT1 ELECTRICAL CHARACTERISTICS (TA=25 C unless otherwise noted) (Countinued)

transistor R1001

Abstract: R1001 18E DBM receiver mmic 84-1LMI XR1001
Contextual Info: 33.0-40.0 GHz GaAs MMIC Receiver R1001 May 2005 - Rev 13-May-05 Features Chip Device Layout Sub-Harmonic Receiver 9.0 dB Conversion Gain 4.0 dB Noise Figure 12.0 dB Image Rejection 100% On-Wafer RF, DC and Noise Figure Testing 100% Visual Inspection to MIL-STD-883

transistor r1004

Abstract: R1004 transistor R1004 84-1LMI XR1004
Contextual Info: 30.0-46.0 GHz GaAs MMIC Receiver R1004 May 2005 - Rev 13-May-05 Features Sub-harmonic Receiver Integrated LNA, LO Doubler/Buffer, Image Reject Mixer +4.0 dBm Input Third Order Intercept IIP3 +2.0 dBm LO Drive Level 9.0 dB Conversion Gain 3.5 dB Noise Figure

2306a

Abstract: D26A sot-23 Marking DL WTC2306A
Contextual Info: WTC2306A N-Channel Enhancement Mode Power MOSFET DRAIN CURRENT 3 DRAIN 5 AMPERES DRAIN SOURCE VOLTAGE 30 VOLTAGE 1 GATE 2 Features: SOURCE 3 *Super High Dense Cell Design For Low R DS ON R DS(ON) <30mΩ@V GS =10V *Rugged and Reliable *Simple Drive Requirement

at91sam7s64 programmer schematic

Abstract: AT91SAM7S64 ISO7816 PA31
Contextual Info: Features • Incorporates the ARM7TDMI ARM® Thumb® Processor • • • • • • • • • • • • • • – High-performance 32-bit RISC Architecture – High-density 16-bit Instruction Set – Leader in MIPS/Watt – Embedded ICE In-circuit Emulation, Debug Communication Channel Support

CDR04

Contextual Info: CDR MIL-PRF-55681 KEY BENEFITS • Broad capacitance range: 1.0 pF to 0.47 µF • Voltages: 50 WVDC and 100 WVDC • Military Established Reliability Failure Rates: M, P, R and S • Available in ten military packages: CDR01, CDR02, CDR03, CDR04, CDR06, CDR31, CDR32, CDR33, CDR34, CDR35

Contextual Info: VTSRC, VSSRC, VSORC-AB Vishay Thin Film 25 or 50 Mil Pitch, Termination Resistor/Capacitor Networks FEATURES • Lead Pb -Free available Pb-free • Resistors and capacitors on a single chip Available • Saves board space Actual Size • Reduces total assembly costs

ptfe insulator

Contextual Info: THIS DRAWING IS UNPUBLISHED. COPYRIGHT 2003 RELEASED FOR PUBLICATION NOV ,2003- LOC ALL RIGHTS RESERVED. BY TYCO ELECTRONICS CORPORATION. DIST E R E V IS IO N S B LTR D /\ SINGLE PACK IN ACCORDANCE WITH AMP SPEC 107-3275 /K 50 TRAY PACK IN ACCORDANCE WITH AMP SPEC 107- 3275

R1004

Abstract: transistor r1004
Contextual Info: 30.0-46.0 GHz GaAs MMIC Receiver R1004 May 2005 - Rev 13-May-05 Features Sub-harmonic Receiver Integrated LNA, LO Doubler/Buffer, Image Reject Mixer +4.0 dBm Input Third Order Intercept IIP3 +2.0 dBm LO Drive Level 9.0 dB Conversion Gain 3.5 dB Noise Figure

U1003

Contextual Info: 19.0-26.0 GHz GaAs MMIC Transmitter U1003 May 2005 - Rev 13-May-05 Features Chip Device Layout Sub-harmonic Transmitter Integrated IR Mixer, LO Buffer & Output Amplifier +20.0 dBm Output Third Order Intercept OIP3 2.0 dBm LO Drive Level 15.0 dB Image Rejection, 8.0 dB Conversion Gain

Linear Potentiometer 500 R

Abstract: PRV4
Contextual Info: PRV4 Vishay Sfernice Industrial Potentiometer FEATURES • • • • • • • • • • 2 Watt at 70°C High power rating Low temperature coefficient Excellent stability Full sealing Low contact resistance variation Robust nickel plated brass shaft

84-1LMI

Abstract: U1002 XB1004 XP1013 XU1002
Contextual Info: 18.0-25.0 GHz GaAs MMIC Transmitter U1002 May 2005 - Rev 13-May-05 Features Chip Device Layout Sub-harmonic Transmitter Integrated IR Mixer, LO Buffer & Output Amplifier +20.0 dBm Output Third Order Intercept OIP3 2.0 dBm LO Drive Level 15.0 dB Image Rejection, 10.0 dB Conversion Gain

ABSTRACT FOR REMOTE OPERATED MASTER SWITCH

Abstract: LVDS connector 40 pin TV board
Contextual Info: TFDU6108 Vishay Semiconductors Fast Infrared Transceiver Module 4 Mbit/s , IrDA Serial Interface Compatible, 2.7 V to 5.5 V Supply Voltage Range Description The TFDU6108 is an infrared transceiver module compliant to the latest IrDA standard for fast infrared

VD135

Contextual Info: 18.0-25.0 GHz GaAs MMIC Transmitter U1002 May 2005 - Rev 13-May-05 Features Chip Device Layout Sub-harmonic Transmitter Integrated IR Mixer, LO Buffer & Output Amplifier +20.0 dBm Output Third Order Intercept OIP3 2.0 dBm LO Drive Level 15.0 dB Image Rejection, 10.0 dB Conversion Gain